Cost-effective test at system-level
| dc.contributor.advisor | Ambler, Tony | en |
| dc.creator | Kim, Hyun-moo, 1970- | en |
| dc.date.accessioned | 2011-06-09T21:10:10Z | en |
| dc.date.available | 2011-06-09T21:10:10Z | en |
| dc.date.issued | 2002-12 | en |
| dc.description | text | en |
| dc.description.abstract | As modern digital hardware/software systems become more complex, the testing of these systems through their entire life-cycle including design verification test, production test, and field test, becomes a severe problem. In addition, the system's own characteristics make it difficult to apply componentlevel test methods for system-level testing. The goal of this dissertation is to provide help in obtaining a cost-effective test model that can be used at systemlevel and with testability at field-level. Equation-based method can be used in finding an appropriate test method, but to use this method, all the cost-related equations have to be developed, which is a very difficult and time-consuming process. At the initial design stage, some parameters are not available, and many are not accurate. A new test selection method using multi-attribute utility analysis (MAUA) is suggested in this dissertation. This method can greatly reduce time in developing model. This dissertation applies MAUA method to chip-level test selection to determine its usefulness, and goes on to apply it to system-level test selection. The results show that the applications of this method in the test selection of chip-level and single-board computer (SBC) point towards the best test method with much less effort compared to when traditional cost equations are developed. | |
| dc.description.department | Electrical and Computer Engineering | en |
| dc.format.medium | electronic | en |
| dc.identifier.uri | http://hdl.handle.net/2152/11601 | en |
| dc.language.iso | eng | en |
| dc.rights | Copyright is held by the author. Presentation of this material on the Libraries' web site by University Libraries, The University of Texas at Austin was made possible under a limited license grant from the author who has retained all copyrights in the works. | en |
| dc.subject | Electronic circuits--Testing--Cost effectiveness | en |
| dc.subject | Electronic circuit design--Economic aspects | en |
| dc.title | Cost-effective test at system-level | en |
| thesis.degree.department | Electrical and Computer Engineering | en |
| thesis.degree.discipline | Electrical and Computer Engineering | en |
| thesis.degree.grantor | The University of Texas at Austin | en |
| thesis.degree.level | Doctoral | en |
| thesis.degree.name | Doctor of Philosophy | en |