Fabricating large area multi-tier nanostructures
| dc.contributor.assignee | Board of Regents, The University of Texas System | |
| dc.creator | Sidlgata V. Sreenivasan | |
| dc.creator | Ovadia Abed | |
| dc.creator | Praveen Joseph | |
| dc.creator | Michelle Grigas | |
| dc.creator | Akhila Mallavarapu | |
| dc.creator | Paras Ajay | |
| dc.date.accessioned | 2019-10-23T19:29:23Z | |
| dc.date.available | 2019-10-23T19:29:23Z | |
| dc.date.filed | 2016-04-19 | |
| dc.date.issued | 2018-04-10 | |
| dc.description.abstract | Methods for fabricating and replicating self-aligned multi-tier nanoscale structures for a variety of cross-sectional geometries. These methods can utilize a single lithography step whereby the need for alignment and overlay in the process is completely eliminated thereby enabling near-zero overlay error. Furthermore, techniques are developed to use these methods to fabricate self-aligned nanoscale multi-level/multi-height patterns with various shapes for master templates, replica templates and nanoimprint based pattern replication. Furthermore, the templates can be used to pattern multiple levels in a sacrificial polymer resist and achieve pattern transfer of the levels into a variety of substrates to form completed large area nanoelectronic and nanophotonic devices using only one patterning step. | |
| dc.description.department | Board of Regents, University of Texas System | |
| dc.identifier.applicationnumber | 15133007 | |
| dc.identifier.patentnumber | 9941389 | |
| dc.identifier.uri | https://hdl.handle.net/2152/76977 | |
| dc.identifier.uri | http://dx.doi.org/10.26153/tsw/4066 | |
| dc.publisher | United States Patent and Trademark Office | |
| dc.relation.ispartof | University of Texas Patents | |
| dc.relation.ispartof | University of Texas Patents | |
| dc.rights.restriction | Open | |
| dc.rights.restriction | Open | |
| dc.subject.cpc | G02B6/124 | |
| dc.subject.cpc | G03F7/0002 | |
| dc.subject.cpc | H01L29/6659 | |
| dc.subject.cpc | H01L21/0271 | |
| dc.subject.cpc | H01L21/0337 | |
| dc.subject.cpc | H01L21/2855 | |
| dc.subject.cpc | H01L21/30604 | |
| dc.subject.cpc | H01L21/3081 | |
| dc.subject.cpc | H01L21/3086 | |
| dc.subject.cpc | H01L21/31144 | |
| dc.subject.cpc | H01L21/76224 | |
| dc.subject.cpc | H01L29/66515 | |
| dc.subject.cpc | H01L29/6653 | |
| dc.subject.cpc | H01L29/66545 | |
| dc.subject.cpc | H01L21/02164 | |
| dc.subject.cpc | H01L21/0228 | |
| dc.subject.cpc | H01L28/90 | |
| dc.subject.cpc | H01L29/665 | |
| dc.subject.uspc | No longer published | |
| dc.title | Fabricating large area multi-tier nanostructures | |
| dc.type | Patent |
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