Multiple copper vias for integrated circuit metallization

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dc.contributor.assigneeBoard of Regents, The University of Texas System
dc.creatorPaul S. Ho
dc.creatorEnnis T. Ogawa
dc.creatorKi-Don Lee
dc.creatorHideki Matsuhashi
dc.date.accessioned2019-10-23T19:26:33Z
dc.date.available2019-10-23T19:26:33Z
dc.date.filed2004-12-13
dc.date.issued2006-07-18
dc.description.abstractElectromigration can be reduced in a copper-based metallization of an integrated circuit that includes a first copper-containing via that electrically connects an underlying conductive line and an overlying copper-containing line through an intervening insulating layer. Electromigration can be reduced by forming at least a second copper-containing via that electrically connects the underlying conductive line and the overlying copper-containing line through the intervening insulating layer, in parallel with the first copper-containing via. Multi-vias can provide redundancy to reduce early failure statistics. Moreover, since current is distributed among the vias, the electromigration driving force can be reduced and local Joule heating, in voids at the via interface, also may be reduced. Accordingly, even if via voids are formed, the structure may not fail by catastrophic thermal runaway due to Joule heating.
dc.description.departmentBoard of Regents, University of Texas System
dc.identifier.applicationnumber11010596
dc.identifier.patentnumber7078817
dc.identifier.urihttps://hdl.handle.net/2152/76849
dc.identifier.urihttp://dx.doi.org/10.26153/tsw/3938
dc.publisherUnited States Patent and Trademark Office
dc.relation.ispartofUniversity of Texas Patents
dc.relation.ispartofUniversity of Texas Patents
dc.rights.restrictionOpen
dc.rights.restrictionOpen
dc.subject.cpcH01L22/34
dc.subject.cpcH01L23/522
dc.subject.cpcH01L23/53228
dc.subject.cpcH01L23/5226
dc.subject.cpcH01L2924/0002
dc.subject.cpcH01L2924/00
dc.subject.uspc257/774
dc.subject.uspc257/758
dc.subject.uspc257/E23.142
dc.subject.uspc257/E23.145
dc.subject.uspc257/E23.161
dc.titleMultiple copper vias for integrated circuit metallization
dc.typePatent

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