Statistical estimation-based noise reduction technique for low power successive approximation register analog-to-digital converters

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dc.contributor.assigneeBoard of Regents, The University of Texas System
dc.creatorNan Sun
dc.creatorLong Chen
dc.creatorXiyuan Tang
dc.date.accessioned2019-10-23T19:28:55Z
dc.date.available2019-10-23T19:28:55Z
dc.date.filed2016-09-28
dc.date.issued2017-09-26
dc.description.abstractDisclosed herein are systems and methods that describe statistical estimation based noise reduction for SAR ADCs. For SAR ADCs, the conversion error can be available at the comparator input. Although a noisy 1-bit comparator may not be able to produce an accurate estimation for its input if used only once, the comparison can be repeated multiple times for a designated bit of the multi-bit SAR ADC. This can allow for the improvement of the estimation accuracy by examining the probability of the comparator output being “1” or “0”. The estimation of a signal from a noisy environment using multiple trials can be cast as a classic statistical estimation issue. In one aspect of the disclosure, an optimal Bayes estimator is disclosed to achieve a low estimation error from the comparator on a designated bit of the multi-bit SAR ADC.
dc.description.departmentBoard of Regents, University of Texas System
dc.identifier.applicationnumber15278519
dc.identifier.patentnumber9774339
dc.identifier.urihttps://hdl.handle.net/2152/76935
dc.identifier.urihttp://dx.doi.org/10.26153/tsw/4024
dc.publisherUnited States Patent and Trademark Office
dc.relation.ispartofUniversity of Texas Patents
dc.relation.ispartofUniversity of Texas Patents
dc.rights.restrictionOpen
dc.rights.restrictionOpen
dc.subject.cpcH03M1/08
dc.subject.cpcH03M1/04
dc.subject.cpcH03M1/0697
dc.subject.cpcH03M1/1009
dc.subject.cpcH03M1/38
dc.subject.cpcH03M1/468
dc.subject.uspcNo longer published
dc.titleStatistical estimation-based noise reduction technique for low power successive approximation register analog-to-digital converters
dc.typePatent

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