Generating RTL for microprocessors from architectural and microarchitectural description
| dc.contributor.advisor | Chiou, Derek | en |
| dc.contributor.committeeMember | Abraham, Jacob | en |
| dc.creator | Bansal, Ankit Sajjan Kumar | en |
| dc.date.accessioned | 2011-06-17T20:38:52Z | en |
| dc.date.available | 2011-06-17T20:38:52Z | en |
| dc.date.available | 2011-06-17T20:38:59Z | en |
| dc.date.issued | 2011-05 | en |
| dc.date.submitted | May 2011 | en |
| dc.date.updated | 2011-06-17T20:39:00Z | en |
| dc.description | text | en |
| dc.description.abstract | Designing a modern processor is a very complex task. Writing the entire design using a hardware description language (like Verilog) is time consuming and difficult to verify. There exists a split architecture/microarchitecture description technique, in which, the description of any hardware can be divided into two orthogonal descriptions: (a) an architectural contract between the user and the implementation, and (b) a microarchitecture which describes the implementation of the architecture. The main aim of this thesis is to build realistic processors using this technique. We have designed an in-order and an out-of-order superscalar processor using the split-description compiler. The backend of this compiler is another contribution of this thesis. | en |
| dc.description.department | Electrical and Computer Engineering | en |
| dc.format.mimetype | application/pdf | en |
| dc.identifier.uri | http://hdl.handle.net/2152/ETD-UT-2011-05-3302 | en |
| dc.language.iso | eng | en |
| dc.subject | Microprocessors | en |
| dc.subject | Microarchitecture | en |
| dc.subject | Processor architecture | en |
| dc.subject | Split-description compiler | en |
| dc.subject | Superscalar processors | en |
| dc.title | Generating RTL for microprocessors from architectural and microarchitectural description | en |
| dc.type.genre | thesis | en |
| thesis.degree.department | Electrical and Computer Engineering | en |
| thesis.degree.discipline | Electrical and Computer Engineering | en |
| thesis.degree.grantor | University of Texas at Austin | en |
| thesis.degree.level | Masters | en |
| thesis.degree.name | Master of Science in Engineering | en |