Browsing by Subject "Si"

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Epitaxial germanium via Ge:C and its use in non-classical semiconductor devices
(2015-12) Mantey, Jason Christopher; Banerjee, Sanjay; Lee, Jack C; Register, Leonard F; Akinwande, Deji; Ferreira, Paulo J
The microelectronics industry has been using Silicon (Si) as the primary material for complementary metal-oxide-semiconductor (CMOS) chip fabrication for more than six decades. Throughout this time, these CMOS devices have gotten exponentially smaller, faster, and cheaper. While new materials and fabrication processes have been slowly added over the years, the CMOS device of today is largely the same as it was decades ago. However, field-effect transistors (FETs) have now scaled so far that Si is approaching physical limits. Thus, new channel materials and new fundamental device structures are being investigated to replace traditional CMOS. Germanium is one of the prime candidates to replace Si in the FET channel, with its increased electron and hole mobilities compared to Si. Perhaps more importantly, it is compatible with the existing Si manufacturing techniques by epitaxially growing thin layers of Ge crystal on the starting Si wafer. Because these two crystals do not share a lattice constant, there will inevitably be crystal defects in the thin Ge layer that can be catastrophic for device functionality. Several approaches have been introduced to reduce defects, but most of them are wastefully thick (>1 um) or require complex manufacturing methods. In this work, we utilize an extremely thin (~10 nm) buffer layer of carbon-doped Ge (Ge:C) to grow Ge and SiGe layers for FET and virtual substrate applications with improved crystalline quality and reduced surface roughnesses. These thin Ge layers not only offer new pathways for MOSFETs, but can also be used in non-classical structures. Semiconductor nanowires (NWs) and tunnel-FETs (TFETs) are two of the most promising device architectures, and both can be used with Ge. This dissertation presents a simulated Si/Ge heterostructure interface TFET that can be fabricated on a virtual substrate made with the Ge:C buffer layer. Detailed analysis on device operation is given. Also in this work is the fabrication process for individually addressable Ge NW-FETs. The NWs offer excellent electrostatic gate control through reduced dimensions and offer another potential pathway for Ge in a post-CMOS world.
Fabrication of silicon nanowires with controlled nano-scale shapes using wet anisotropic etching
(2015-08) Yin, Bailey Anderson; Sreenivasan, S. V.; Banerjee, Sanjay K; Bonnecaze, Roger T; Cullinan, Michael A; Li, Wei
Silicon nanowires can enable important applications in energy and healthcare such as biochemical sensors, thermoelectric devices, and ultra-capacitors. In the energy sector, for example, as the need for more efficient energy storage continues to grow for enabling applications such as electric vehicles, high energy storage density capacitors are being explored as a potential replacement to traditional batteries that lack fast charge/discharge rates as well as have shorter life cycles. Silicon nanowire based ultra-capacitors offer increased energy storage density by increasing the surface area per unit projected area of the electrode, thereby allowing more surface “charge” to reside. The motivation behind this dissertation is the study of low-cost techniques for fabrication of high aspect ratio silicon nanowires with controlled geometry with an exemplar application in ultra-capacitors. Controlled transfer of high aspect ratio, nano-scale features into functional device layers requires anisotropic etch techniques. Dry reactive ion etch techniques are commonly used since most solution-based wet etch processes lack anisotropic pattern transfer capability. However, in silicon, anisotropic wet etch processes are available for the fabrication of nano-scale features, but have some constraints in the range of geometry of patterns that they can address. While this lack of geometric and material versatility precludes the use of these processes in applications like integrated circuits, they can be potentially realized for fabricating nanoscale pillars. This dissertation explores the geometric limitations of such inexpensive wet anisotropic etching processes and develops additional methods and geometries for fabrication of controlled nano-scale, high aspect ratio features. Jet and Flash Imprint Lithography (J-FIL™) has been used as the preferred pre-etch patterning process as it enables patterning of sub-50 nm high density features with versatile geometries over large areas. Exemplary anisotropic wet etch processes studied include Crystalline Orientation Dependent Etch (CODE) using potassium hydroxide (KOH) etching of silicon and Metal Assisted Chemical Etching (MACE) using gold as a catalyst to etch silicon. Experiments with CODE indicate that the geometric limitations of the etch process prevent the fabrication of high aspect ratio nanowires without adding a prohibitive number of steps to protect the pillar geometry. On the other hand, MACE offers a relatively simple process for fabricating high aspect ratio pillars with unique cross sections, and has thus been pursued to fabricate fully functional electrostatic capacitors featuring both circular and diamond-shaped nano-pillar electrodes. The capacitance of the diamond-shaped nano-pillar capacitor has been shown to be ~77.9% larger than that of the circular cross section due to the increase in surface area per unit projected area. This increase in capacitance approximately matches the increase calculated using analytical models. Thus, this dissertation provides a framework for the ability to create unique sharp cornered nanowires that can be explored further for a wider variety of cross sections.
Wide band gap oxide-semiconductor heterostructures grown by molecular beam epitaxy
(2020-12-04) Hadamek, Tobias; Demkov, Alexander A.; De Lozanne, Alejandro L; Ekerdt, John G; Lai, Keji; Tsoi, Maxim
Wide band gap oxides and semiconductors will have tremendous impact on future energy efficient and environmentally sustainable electronics. Wide gap semiconductors like GaN and AlGaN are important in light emitting diode applications and for high-frequency telecom and radar applications like base stations for upcoming 5G networks. Further, these materials along with some wide band gap semiconducting oxides like Ga₂O₃ may prove to be invaluable for medium to high power electronics applications, starting from switching power supplies used to charge batteries in consumer devices like smartphones and laptops, to high-power supplies that can charge electric car batteries and are suitable for electric grid and power transmission line applications. Basic materials studies of these material systems are therefore in high demand. In this dissertation I will present materials studies on wide band gap oxide thin films grown by molecular beam epitaxy on crystalline semiconductor substrates. The oxide thin films are characterized with regards to epitaxial structure and electronic structure by electron and x-ray diffraction techniques, by photoelectron spectroscopy and in collaboration with researchers from UT Dallas, Arizona State University, Rutgers University and University of Turku by transmission electron microscopy, inverse photoemission spectroscopy and scanning tunneling spectroscopy. Two materials systems are discussed in detail: 1. The rare-earth sesquioxide Eu₂O₃ in regards to potential gate-dielectric applications on the wide band gap semiconductor GaN. The focus of the studies were interface quality, structural quality, and band offsets; and the electronic structure of Eu₂O₃ to determine the band gap and understand the influence of Eu 4f states on the band gap of Eu₂O₃. 2. The structural integration of ultra-wide band gap oxide semiconductor Ga₂O₃ on a standard Si semiconductor substrate. Epitaxial integration of Ga₂O₃ with the workhorse of semiconductors Si can enable cost-reduction & monolithically-integrated devices. The focus of the studies was the structural characterization of the Ga₂O₃ layers grown by plasma-assisted molecular beam epitaxy.