Circuits and architectures for radio transceivers employing phase and frequency domain orthogonality

Srinivasan, Rangakrishnan
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The design of low-power radio receivers for short-range, low data-rate applications such as wireless sensor node networks, machine-to-machine communications, self-powered sensors and cross-correlation receivers presents a unique set of trade-offs between dynamic range, power and area. Two low-power radio receiver architectures that address such applications are considered as part of the research. Both the receiver designs achieve a high gain-bandwidth per unit-power dissipation metric by employing signal recursion. The first design is a direct-downconversion receiver with quadrature outputs that employs 2nd-order signal recursion. The approach enables concurrent amplification of both radio-frequency and downconverted baseband signals with transconductance re-use. System stability and mitigation of self-interference arising from the circulation of both RF and baseband quadrature signals in the radio receiver are critical. Orthogonal signal phasing and frequency-domain separation are employed to achieve stability and minimize self-interference in the design. Noise and linearity of the receiver are analyzed. Additionally, the problem of flicker noise in a low-power direct-downconversion receiver from the baseband loads is addressed by utilizing frequency chopping. The baseband load with the chopper is optimized for flicker noise which further helps to enhance its impedance and thereby the conversion gain of the receiver. The second design explores the use of 3rd-order signal recursion to provide concurrent amplification at three distinct frequencies, that is, the input radio frequency RF, an intermediate frequency IF, and the final baseband frequency BB, while utilizing the same DC bias current. A low-power Weaver image-reject receiver based on 3rd-order signal recursion and employing current, transconductance and mixer re-use is demonstrated. The design employs two 3rd-order recursive downconverters whose outputs multiply the input in time by quadrature LO signals. The receiver re-uses the same quadrature mixers to perform the two frequency translations. Similar to the 2nd-order design, stability and mitigation of self-interference are critical requirements. Stability of the receiver and self-interference minimization are achieved by employing orthogonal phasing and frequency separation in the architecture. The properties of the receiver are investigated. Noise and linearity of the receiver are analyzed. The design allows for low flicker noise without the requirement for frequency chopping. The problem of self-images due to harmonics of LO is addressed along with primary images. An extension to implement a 3rd-order recursive direct-downconversion receiver is outlined. The above receivers are intended for time-domain or frequency-domain duplexed operation, with the transmitter. In the recent years, there has been significant research in full-duplex transceivers since they can provide more efficient spectrum utilization. In this approach, the transmitter and receiver are operational simultaneously, at the same frequency. In this work, a full-duplex transceiver front-end employing a 4-phase inverse class-D power amplifier with reciprocal phase shifters is demonstrated. An external LC phase-shift network is employed between the receiver port and the antenna port of the transceiver. With proper phasing of the switching devices of the power amplifier, the design allows for the transmitter and receiver to operate at the same frequency simultaneously, while attenuating the transmitter signal at the receiver port. The transmit signals add constructively at the transmitter port to deliver high output power, while they add destructively at the receiver port to provide self-interference cancellation. The effect of practical switching devices is considered and a cascode structure is proposed to ensure that the switching devices are in the linear region of operation. Noise in the LO path affects the overall noise figure of the canceler. Tapered phase shifters are investigated for improving the trade-off between transmit efficiency and receive noise figure