Thin film transistors based on transition metal dichalcogenides for spintronics and logic circuits

Date

2023-06-23

Authors

Li, Xintong, Ph. D.

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Abstract

Thin film transistors (TFTs) based on two-dimensional (2D) van der Waals materials have attracted significant interest in the post-Moore era due to their unique properties, such as high carrier mobility, ultra-thin thickness, tunable bandgap, reduced short channel effects, and novel physics such as Moiré pattern and spin and valley Hall effects (SVHE). These properties have the potential to enable faster, more efficient logic and analog circuits, memory, optoelectronics and spintronics. TFTs based on transition metal dichalcogenides (TMDs) are popular since these materials possess proper thickness-dependent band structures, high mobility, and abundant novel physics. In this dissertation, the TFTs mainly based on tungsten diselenide (WSe₂) are fabricated and studied. First, the SVHE in monolayer WSe₂ TFTs is experimentally measured, and key parameters are extracted from the measurements. Kerr rotation (KR) measurements show the spatial distribution of the SVHE at different temperatures, its persistence up to 160 K, and that it can be electrically modulated via gate and drain bias. A spin/valley drift and diffusion model together with a reflection measurement and a four-port electrical measurement is used to interpret the KR data. The spin/valley lifetime, mean free path and polarization are calculated. These are important steps towards the potential application of spintronics and valleytronics based on TMD materials. Then the potential of TMD based TFTs in logic circuits is studied, which is a more practical application. New ambipolar dual-gate TFTs based on WSe₂ are fabricated and show near-ideal performances, including a high on-off ratio, low off-state current, ideal subthreshold swing (SS), and negligible hysteresis. For the first time, cascadable logic gates based on ambipolar TMD transistors are then demonstrated with fewer transistors than CMOS and minimal static power consumption, including inverters, XOR, NAND, NOR, and buffers made by cascaded inverters. Then a thorough study of the behavior of both gates is conducted, which has previously been lacking. The large noise margin enables the implementation of VT-drop circuits, a type of logic with reduced transistor number and simplified circuit design. Finally, the speed performance of the VT-drop and other circuits built by dual-gate devices are qualitatively analyzed.

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