Bit error tolerance of Deep Neural Network accelerators

The resurgence of machine learning in various applications and it's inherent compute-intensive nature require hardware accelerators in the edge devices. The underlying process technology is prone to faults. Hence, there is a need to make these hardware accelerators dependable. Deep Convolutional Neural Networks perform well for machine learning applications like image classification. This report presents the impact of bit errors on the DNN's performance. Most accelerators are designed with a one data type that fits all approach. The sensitivity of the DNNs with a single-precision floating-point format is studied. Due to the high sensitivity of the deep layers to critical bit errors and rapid performance degradation with increasing BER, several potential techniques to actively improve fault tolerance are discussed.