VWSIM : a circuit simulator
| dc.contributor.advisor | Hunt, Warren A., 1958- | |
| dc.contributor.committeeMember | McMillan, Kenneth | |
| dc.creator | Ramanathan, Vivek | |
| dc.date.accessioned | 2023-11-28T23:44:12Z | |
| dc.date.available | 2023-11-28T23:44:12Z | |
| dc.date.created | 2023-05 | |
| dc.date.issued | 2023-05-08 | |
| dc.date.submitted | May 2023 | |
| dc.date.updated | 2023-11-28T23:44:12Z | |
| dc.description.abstract | VWSIM is a circuit simulator for rapid, single-flux, quantum (RSFQ) circuits. The simulator is designed to model and simulate primitive-circuit devices such as capacitors, inductors, Josephson junctions, and can be extended to simulate other circuit families, such as CMOS. Written in the ACL2 logic, VWSIM provides formal mathematical guarantees about each of the circuit models it simulates. The ACL2-based definition of the VWSIM simulator offers a path for specifying and verifying RSFQ circuit models. | |
| dc.description.department | Computer Science | |
| dc.format.mimetype | application/pdf | |
| dc.identifier.uri | https://hdl.handle.net/2152/122803 | |
| dc.identifier.uri | https://doi.org/10.26153/tsw/49606 | |
| dc.language.iso | en | |
| dc.subject | Circuit simulation | |
| dc.subject | ACL2 | |
| dc.subject | RSFQ | |
| dc.subject | Josephson junction | |
| dc.title | VWSIM : a circuit simulator | |
| dc.type | Thesis | |
| dc.type.material | text | |
| thesis.degree.department | Computer Sciences | |
| thesis.degree.discipline | Computer Science | |
| thesis.degree.grantor | The University of Texas at Austin | |
| thesis.degree.level | Masters | |
| thesis.degree.name | Master of Science in Computer Sciences |
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