Optimizing dynamic reseeding of tests in a UVM testbench

Date

2018-05-03

Authors

Bhaskar, Varsha

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Abstract

The coverage problem has been a long standing issue in simulation based verification. Coverage metrics are required to track the progress and justify completeness of simulation vectors. This thesis basically describes the importance of seeding the UVM tests to obtain the necessary coverage. It presents a technique of optimized dynamic reseeding of the UVM tests to meet the coverage requirement. This thesis may be called an extension to [1] following the same structure with a parallel interface to get dynamic information from the the UVM testbench to the evaluation loop which does the reseeding procedure. The process of figuring out the next best seed has been optimized with various techniques leading to faster dynamic reseeding. The optimization algorithms have been applied to two UVM testbenches. The first is a very simplified UVM testbench of a comparator from [2]. The second is an UVM testbench with an elaborate test suite that has been constructed for an AXI AMBA 4 Interconnect. The DUT from [2] was chosen to show the improvements caused by optimization techniques applied in this thesis in the reseed evaluation with respect to the reseeding method in [1] thus highlighting the improvement caused by optimization in this thesis.

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