Exploring shared data caches for network processors

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dc.contributor.advisorVin, Harrick M.
dc.creatorAgarwal, Piyush
dc.date.accessioned2022-03-03T20:28:21Z
dc.date.available2022-03-03T20:28:21Z
dc.date.issued2005-08-15
dc.description.abstractExponential link bandwidth increase over the past decade has sparked off interest in increasingly complex packet processing applications. To provide flexible and high-performance systems supporting these applications, a new breed of processors called Network Processors has emerged. These processors face an intensified Memory wall problem. They do not employ latency reducing techniques and instead rely on latency hiding techniques alone. Prior work has shown that this approach is inherently limited by the off-chip memory bandwidth. In this context, we analyze the effectiveness of a centralized data cache shared among all the processing cores of a Network Processor. We show that high hit-rates observed translate into significant improvement in processor utilization levels in memory bandwidth constrained environments. We also investigate a software based cache implementation with a goal to provide the benefit of data caching in current generation of Network Processors (that lack hardware data caches). We highlight various issues that constrain the design and implementation of a software cache on the IXP class of Network Processors
dc.description.departmentComputer Science
dc.format.mediumelectronic
dc.identifier.urihttps://hdl.handle.net/2152/103955
dc.identifier.urihttp://dx.doi.org/10.26153/tsw/30870
dc.language.isoeng
dc.relation.ispartofUT Electronic Theses and Dissertations
dc.rightsCopyright © is held by the author. Presentation of this material on the Libraries' web site by University Libraries, The University of Texas at Austin was made possible under a limited license grant from the author who has retained all copyrights in the works.
dc.rights.restrictionRestricted
dc.subjectShared data caches
dc.subjectNetwork processes
dc.titleExploring shared data caches for network processors
dc.typeThesis
dc.type.genreThesis
thesis.degree.departmentComputer Sciences
thesis.degree.disciplineComputer Sciences
thesis.degree.grantorUniversity of Texas at Austin
thesis.degree.levelMasters
thesis.degree.nameMaster of Arts

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