Dual work function metal gates by full silicidation of poly-Si with Ni or Ni-Co bi-layers
| dc.contributor.advisor | Kwong, Dim-Lee | en |
| dc.creator | Liu, Jun, 1979- | en |
| dc.date.accessioned | 2008-08-28T23:10:26Z | en |
| dc.date.available | 2008-08-28T23:10:26Z | en |
| dc.date.issued | 2006 | en |
| dc.description | text | en |
| dc.description.abstract | According to the 2005 International Technology Roadmaps for Semiconductors (ITRS), one of the most important challenges in the semiconductor industry is the continuously scaling of the gate oxide thickness. However the depletion of gate poly-Si makes it difficult to continue this scaling especially for sub100 nm CMOS generation. In this work, novel fully silicided (FUSI) metal gates are proposed to tackle this problem and avoid poly depletion effect. Silicides have much higher electron concentration than poly Si, which eliminates the polysilicon depletion effect in these FUSI gates. Thanks to the wide usage of NiSi and Co-NiSi in the current CMOS processing flow, these two silicides become best candidates of FUSI gates. In order to achieve surface-channel p- and n- MOSFETs, there are two main criteria requirements for new gate material: Proper Work functions for two vii types of MOSFET (4.1-4.4eV for NMOS and 4.8-5.1eV for PMOS) and good thermal stability after high temperature anneals. In this paper, Co-Ni alloy silicides is used as FUSI gate and Co-Ni ratio is tuned to manipulate work function. While the method is dopant-free, the work functions hardly meet the CMOS requirements. Doped poly Si is used to form silicides in the experiments and silicidation induced segregation effect (SIIS) is observed and manipulated to tune work function. High dosage and multiple dopant pre-implantation are proven to push work functions of FUSI gates to the requirements of CMOS transistors. (4.28eV for NMOS, 5.08eV for PMOS) Negative impact of SIIS is observed in B-doped samples due to B penetration. NiSi-gated MOSFET is studied extensively to minimize the negative impact by the FUSI processing and the reliability of MOSFET is improved by nitridation of gate dielectrics. In order to realize stable NiSi work function in the case of the small dimension transistors, two-step silicidation process is extensively studied. As-doped sample is found to have larger reaction rate than B-doped sample. Different thermal conditions for both As-doped and B-doped samples are found to meet the FUSI requirements. | |
| dc.description.department | Electrical and Computer Engineering | en |
| dc.format.medium | electronic | en |
| dc.identifier | b66061076 | en |
| dc.identifier.oclc | 163920039 | en |
| dc.identifier.uri | http://hdl.handle.net/2152/2817 | en |
| dc.language.iso | eng | en |
| dc.rights | Copyright is held by the author. Presentation of this material on the Libraries' web site by University Libraries, The University of Texas at Austin was made possible under a limited license grant from the author who has retained all copyrights in the works. | en |
| dc.subject.lcsh | Silicon oxide | en |
| dc.subject.lcsh | Gate array circuits | en |
| dc.title | Dual work function metal gates by full silicidation of poly-Si with Ni or Ni-Co bi-layers | en |
| dc.type.genre | Thesis | en |
| thesis.degree.department | Electrical and Computer Engineering | en |
| thesis.degree.discipline | Electrical and Computer Engineering | en |
| thesis.degree.grantor | The University of Texas at Austin | en |
| thesis.degree.level | Doctoral | en |
| thesis.degree.name | Doctor of Philosophy | en |