Characterization Of Thermal Stresses And Plasticity In Through-Silicon Via Structures For Three-Dimensional Integration

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dc.contributor.utaustinauthorJiang, Tengfeien
dc.contributor.utaustinauthorRyu, Suk-Kyuen
dc.contributor.utaustinauthorIm, Jayen
dc.contributor.utaustinauthorHuang, Ruien
dc.contributor.utaustinauthorHo, Paul S.en
dc.creatorJiang, T. F.en
dc.creatorRyu, S. K.en
dc.creatorIm, J.en
dc.creatorHuang, R.en
dc.creatorHo, P. S.en
dc.date.accessioned2015-04-16T13:58:05Zen
dc.date.available2015-04-16T13:58:05Zen
dc.date.issued2014en
dc.description.abstractThrough-silicon via (TSV) is a critical element connecting stacked dies in three-dimensional (3D) integration. The mismatch of thermal expansion coefficients between the Cu via and Si can generate significant stresses in the TSV structure to cause reliability problems. In this study, the thermal stress in the TSV structure was measured by the wafer curvature method and its unique stress characteristics were compared to that of a Cu thin film structure. The thermo-mechanical characteristics of the Cu TSV structure were correlated to microstructure evolution during thermal cycling and the local plasticity in Cu in a triaxial stress state. These findings were confirmed by microstructure analysis of the Cu vias and finite element analysis (FEA) of the stress characteristics. In addition, the local plasticity and deformation in and around individual TSVs were measured by synchrotron x-ray microdiffraction to supplement the wafer curvature measurements. The importance and implication of the local plasticity and residual stress on TSV reliabilities are discussed for TSV extrusion and device keep-out zone (KOZ).en
dc.description.departmentMicroelectronics Research Centeren
dc.identifier.citationTengfei Jiang, Suk-Kyu Ryu, Jay Im, Rui Huang, and Paul S. Ho. AIP Conference Proceedings 1601, 55 (2014); doi: 10.1063/1.4881340en
dc.identifier.doi10.1063/1.4881340en
dc.identifier.issn0094-243Xen
dc.identifier.urihttp://hdl.handle.net/2152/29351en
dc.language.isoEnglishen
dc.relation.ispartofserialStress Induced Phenomena and Reliability in 3d Microelectronicsen_US
dc.rightsAdministrative deposit of works to UT Digital Repository: This works author(s) is or was a University faculty member, student or staff member; this article is already available through open access or the publisher allows a PDF version of the article to be freely posted online. The library makes the deposit as a matter of fair use (for scholarly, educational, and research purposes), and to preserve the work and further secure public access to the works of the University.en
dc.subject3d integrationen
dc.subjectthrough-silicon via (tsv)en
dc.subjectthermo-mechanicalen
dc.subjectreliabilityen
dc.subjectfeaen
dc.subjectx-ray microdiffractionen
dc.subjectcu thin-filmsen
dc.subjectcopper-filmsen
dc.subjectrelaxationen
dc.subjectpassivationen
dc.subjectreliabilityen
dc.subjecthistoryen
dc.subjectviasen
dc.subjectsien
dc.subjectengineering, electrical & electronicen
dc.subjectmaterials science,en
dc.subjectmultidisciplinaryen
dc.subjectphysics, applieden
dc.titleCharacterization Of Thermal Stresses And Plasticity In Through-Silicon Via Structures For Three-Dimensional Integrationen
dc.typeConference proceedingsen

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