Characterization Of Thermal Stresses And Plasticity In Through-Silicon Via Structures For Three-Dimensional Integration

Date

2014

Authors

Jiang, T. F.
Ryu, S. K.
Im, J.
Huang, R.
Ho, P. S.

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Abstract

Through-silicon via (TSV) is a critical element connecting stacked dies in three-dimensional (3D) integration. The mismatch of thermal expansion coefficients between the Cu via and Si can generate significant stresses in the TSV structure to cause reliability problems. In this study, the thermal stress in the TSV structure was measured by the wafer curvature method and its unique stress characteristics were compared to that of a Cu thin film structure. The thermo-mechanical characteristics of the Cu TSV structure were correlated to microstructure evolution during thermal cycling and the local plasticity in Cu in a triaxial stress state. These findings were confirmed by microstructure analysis of the Cu vias and finite element analysis (FEA) of the stress characteristics. In addition, the local plasticity and deformation in and around individual TSVs were measured by synchrotron x-ray microdiffraction to supplement the wafer curvature measurements. The importance and implication of the local plasticity and residual stress on TSV reliabilities are discussed for TSV extrusion and device keep-out zone (KOZ).

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Citation

Tengfei Jiang, Suk-Kyu Ryu, Jay Im, Rui Huang, and Paul S. Ho. AIP Conference Proceedings 1601, 55 (2014); doi: 10.1063/1.4881340