Generating irregular data-stream accelerators : methodology and applications
| dc.contributor.advisor | Chiou, Derek | en |
| dc.contributor.committeeMember | Abraham, Jacob | en |
| dc.contributor.committeeMember | Chung, Eric | en |
| dc.contributor.committeeMember | Gerstlauer, Andreas | en |
| dc.contributor.committeeMember | Pingali, Keshav | en |
| dc.creator | Lavasani, Maysam | en |
| dc.date.accessioned | 2015-09-25T18:34:59Z | en |
| dc.date.available | 2015-09-25T18:34:59Z | en |
| dc.date.issued | 2015-05 | en |
| dc.date.submitted | May 2015 | en |
| dc.date.updated | 2015-09-25T18:34:59Z | en |
| dc.description | text | en |
| dc.description.abstract | This thesis presents Gorilla++, a language and a compiler for generating customized hardware accelerators that process input streams of data. Gorilla++ uses a hierarchical programming model with sequential engines run in parallel and communicate through FIFO interfaces. It also incorporates offload and lock constructs in the language to support safe accesses to global resources. Beside conventional compiler optimizations for regular streaming, the programming model opens up new optimization opportunities including (i) multi-threading to share computation resources by different execution contexts inside an engine, (ii) offload-sharing to share resources between different engines, and (iii) pipe-offloading to pipeline part of a computation that is not efficiently pipelinable as a whole. Due to the dynamic nature of Gorilla++ target applications, closedform formulations are not sufficient for exploring the design space of accelerators. Instead, the design space is explored iteratively using a rule-based refinement process. In each iteration, the rules capture inefficiencies in the design, either bottlenecks or under-utilized resources, and change the design to eliminate the inefficiencies. Gorilla++ is evaluated by generating a set of FPGA-based networking and big-data accelerators. The experimental results demonstrate (i) the expressiveness and generality of Gorilla++ language, (ii) the effectiveness of Gorilla++ compiler optimizations, and (iii) the improvement in the design space exploration (DSE) using rule-based refinement process. | en |
| dc.description.department | Electrical and Computer Engineering | en |
| dc.format.mimetype | application/pdf | en |
| dc.identifier | doi:10.15781/T25K5C | en |
| dc.identifier.uri | http://hdl.handle.net/2152/31409 | en |
| dc.language.iso | en | en |
| dc.subject | Hardware accelerators | en |
| dc.subject | High-level synthesis | en |
| dc.subject | Auto-refinement | en |
| dc.subject | Big-data | en |
| dc.title | Generating irregular data-stream accelerators : methodology and applications | en |
| dc.type | Thesis | en |
| thesis.degree.department | Electrical and Computer Engineering | en |
| thesis.degree.discipline | Electrical and Computer Engineering | en |
| thesis.degree.grantor | The University of Texas at Austin | en |
| thesis.degree.level | Doctoral | en |
| thesis.degree.name | Doctor of Philosophy | en |