Designing an efficient test pattern generator using input reduction with linear operations

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dc.contributor.advisorTouba, Nur A.
dc.creatorLee, Kangjoo
dc.date.accessioned2018-08-30T18:10:20Z
dc.date.available2018-08-30T18:10:20Z
dc.date.created2018-05
dc.date.issued2018-05-07
dc.date.submittedMay 2018
dc.date.updated2018-08-30T18:10:20Z
dc.description.abstractAdvances in fabrication technology have resulted in more complicated systems, being used in ever increasing numbers of applications. The large increase in transistor counts versus the number of pins on the chip has made VLSI testing much harder than ever before. Denser integrated circuits chips increase the required test cases enormously for comprehensive testing of a chip. This results in expensive test cost and long test time. In this thesis, an improved method for on-chip test pattern generation is proposed. It generates a complete test set more efficiently by using input reduction with linear operations. Input reduction for pseudo-exhaustive test pattern generation based on compatible and inverse-compatible relationships between inputs has been proposed in the past. This work extends the concept by using linear combinations of inputs to generate other inputs as a means for further input reduction. Results are presented showing the improvements that can be obtained.
dc.description.departmentElectrical and Computer Engineering
dc.format.mimetypeapplication/pdf
dc.identifierdoi:10.15781/T2X05XX6H
dc.identifier.urihttp://hdl.handle.net/2152/68223
dc.language.isoen
dc.subjectTest pattern generator
dc.subjectPseudo-exhaustive testing
dc.subjectCompatibility matrix
dc.subjectGauss-Jordan Elimination
dc.subjectLinear operations
dc.titleDesigning an efficient test pattern generator using input reduction with linear operations
dc.typeThesis
dc.type.materialtext
thesis.degree.departmentElectrical and Computer Engineering
thesis.degree.disciplineElectrical and Computer Engineering
thesis.degree.grantorThe University of Texas at Austin
thesis.degree.levelMasters
thesis.degree.nameMaster of Science in Engineering

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