Research and development of high voltage SiC bipolar junction transistor

In this Dissertation, a 3kV level 4H-SiC Bipolar Junction Transistor (BJT) was designed, simulated, fabricated, and characterized. The epi layers were selected with a theoretical vertical breakdown voltage of about 4.1kV, which was verified both by hand calculation and Sentaurus TCAD simulation. With a four step Junction Termination Extension (JTE) structure with total width longer than 40μm, the BJT simulated and measured collector-base breakdown voltage and collector-emitter breakdown voltage were both higher than 3kV. The BJT base layer was designed to be as thin and lightly doped as possible to guarantee the current gain, giving a record light base charge density of 1.2×10¹³cm⁻². According to measurement results, the current gain of the BJT was dependent mostly on the minority carrier lifetime. Therefore, the minority carrier lifetime enhancement process was conducted and studied. Different cell geometries of BJTs were fabricated, with variations include circular/finger device, finger length, finger width and finger numbers. Among all available devices, a minimal specific on-resistance of about 6.7mΩ*cm² was achieved, which was smaller than the calculated epi resistance and indicated the existence of conduction modulation. With help of TCAD simulation, the impact of cell geometries on BJT conduction performances was summarized.