Applying Universal Verification Methodology on a Universal Asynchronous Receiver/ Transmitter design

dc.contributor.advisorAbraham, Jacob A.
dc.creatorLin, Ling (M.S. in Engineering),
dc.creator.orcid0000-0002-5341-2709
dc.date.accessioned2021-02-11T17:17:14Z
dc.date.available2021-02-11T17:17:14Z
dc.date.created2020-05
dc.date.issued2020-05-19
dc.date.submittedMay 2020
dc.date.updated2021-02-11T17:17:14Z
dc.description.abstractUniversal asynchronous receiver/ transmitter (UART) is a computer hardware device that is used to transform user data to parallel and serial forms. The UART protocol is typically integrated in an Integrated Circuit (IC) which is used for serial communication over a computer or a peripheral device. The UART protocol accepts the input data as bytes and transmits the single bits in a sequential way. Usually, there will one or more UART peripherals which are integrated in microcontrollers and related devices which can support synchronous operation. The UART communication method may be done in three different ways: simplex (in one direction only), full duplex (both devices can receive and send data simultaneously) and half duplex (both devices can take turns to receive and transmit data). The structure of the data frame contains a single start bit, followed by next five to nine bits, depends on the code set employed. If there is a parity bit, then it will be placed after all the data bits. The next one or two bits are always logic high to indicate the stop bit(s). This technical report will demonstrate a verification methodology to verify WISHBONE UART IP Core using the Universal Verification Methodology (UVM) process.
dc.description.departmentElectrical and Computer Engineering
dc.format.mimetypeapplication/pdf
dc.identifier.urihttps://hdl.handle.net/2152/84692
dc.identifier.urihttp://dx.doi.org/10.26153/tsw/11664
dc.language.isoen
dc.subjectUART
dc.subjectUVM
dc.titleApplying Universal Verification Methodology on a Universal Asynchronous Receiver/ Transmitter design
dc.typeThesis
dc.type.materialtext
thesis.degree.departmentElectrical and Computer Engineering
thesis.degree.disciplineElectrical and Computer Engineering
thesis.degree.grantorThe University of Texas at Austin
thesis.degree.levelMasters
thesis.degree.nameMaster of Science in Engineering
Files
Original bundle
Now showing 1 - 1 of 1
Loading...
Thumbnail Image
Name:
LIN-MASTERSREPORT-2020.pdf
Size:
642.06 KB
Format:
Adobe Portable Document Format
License bundle
Now showing 1 - 2 of 2
No Thumbnail Available
Name:
PROQUEST_LICENSE.txt
Size:
4.45 KB
Format:
Plain Text
Description:
No Thumbnail Available
Name:
LICENSE.txt
Size:
1.84 KB
Format:
Plain Text
Description: