Design of a time-based sigma-delta modulator
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In this thesis, a time-based oversampling sigma-delta analog-to-digital converter (ADC) architecture is introduced. This system uses time, instead of voltage, as the analog variable for it quantizer, where the noise shaping process is realized by modulating the width of a variable-width digital pulse. The sigma-delta loop integrator, comparator, and subtractor are all time-based circuits and implemented by using only digital gates. The only voltage-based circuit is voltage-to-time Converter (VTC) which requires only a current source. No amplifier is required in the entire circuit. As a proof of concept, the simulation results for a prototype ADC incorporating this time-based sigma-delta ADC architecture is presented.