A random jitter RMS measurement method using AND and OR operations
Jitter is defined as timing uncertainties of digital signals at their intended ideal positions in time. While it undermines valuable clock budget and limits the maximum clock frequency in I/O circuitry, it is one of the most difficult parameters to measure accurately due to the small value and randomness. This thesis proposes a random jitter RMS measurement method using AND and OR operations, which targets BIST applications. This thesis is organized as follows. Chapter 1 introduces the motivation of the proposed work. It includes a comparison between two major approaches to jitter measurement. Chapter 2 explains the proposed random jitter estimation method in detail. Chapter 3 describes circuit implementations with design considerations. Chapter 4 demonstrates estimation results from circuit level simulation runs. Chapter 5 discusses the source of error in the jitter estimation and concludes.