Techniques to increase compaction of output responses with unknown (X) values
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Testing requires checking whether the output response of a circuit or system is correct or has an error. Increasingly complex system-on-chip and 3-D integrated circuits require enormous amounts of manufacturing test data. Test compression techniques are widely used to compress the amount of output response data in a way that if an error is present in the uncompacted output response, it will also be present in the compacted output response with only a negligibly small chance of aliasing. Compacting the output response reduces the number of channels needed on the automatic test equipment (ATE) and reduces tester memory requirements. A major challenge for output compaction techniques is dealing with unknown (X) values in the output response which may arise from many sources such as uninitialized memories, analog blocks, tri-states, false paths, etc. While some compactor designs can guarantee observation of errors in the presence of a small number of X's, they may not be sufficient for designs with high X-densities which are becoming increasingly common. This dissertation presents novel advanced techniques to further optimize the handling of X’s and scale existing schemes to handle higher X-densities. New designs and techniques will be presented to reduce the control data required to more efficiently handle X’s and achieve higher compression with experimental results in the respective sections.