Electrical characterization of doped strontium titanate thin films for semiconductor memories
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Doped strontium titanate (ST) thin films were investigated for highdensity memory applications. ST has become a promising candidate to replace conventional silicon oxide due to its high inherent dielectric constant, superior leakage characteristics, and good chemical stability. However, oxygen vacancies and the problems that arise as a result are one of the main drawbacks against this material. Resistance degradation is a serious reliability issue in perovskite titanate films and may be a result of oxygen vacancies. In this dissertation, an attempt to reduce the resistance degradation was made by doping the ST films with both niobium and lanthanum. Niobium is a Bsite donor in the perovskite, whereas lanthanum is an A-site donor. Both have an extra valence charge than the atom which it replaces in the crystal structure. With a higher valence charge, the number of oxygen vacancies is hoped to be reduced and result in better electrical performance. Experimental results showed that the degradation rate is reduced by doping with either niobium or lanthanum. A bilayer study was also performed to optimize the dielectric with the strengths of both doped and undoped strontium titanate and to distinguish the source of the oxygen vacancies. A study on the conduction mechanisms and dielectric dispersion was also performed. An additional study was made on the effect of iridium as a possible gate electrode for a MOS capacitor. Hafnium oxide was used as the high-permittivity oxide. The results observed showed that the capacitance was higher for iridium electrodes than those for platinum electrodes. However, both electrodes showed unacceptable frequency dispersion which may be caused by crude patterning techniques. A hysteresis review was also done for hafnium and zirconium oxides. It was observed that the hysteresis measured in the high-permittivity oxides are dependent on the accumulation sweep voltage due to the trapping and de-trapping of charge at the dielectric-silicon interface.