Reducing cache misses due to frequent context switching using a cache context store
MetadataShow full item record
Computer system performance has been pushed further and further for decades, and hence the complexity of the designs has been increasing as well. This is true for both hardware and software. Problems at the interface of hardware and software are particularly interesting, as are solutions which include interaction between hardware and software. Cache misses due to frequent context switching is one such problem and the solution proposed in this thesis is to save the cache context of processes in a memory called a Cache Context Store (CCS). The CCS is designed as a byte-addressable memory close to the processor capable of holding multiple cache contexts. Speedup achievable by such a system is calculated analytically using experimental data from running SPEC CPU2006 benchmarks on a real system.