Memristor based arithmetic circuit design
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The revolution in electronics enabled by Moore’s Law has been driven historically by the ability to fabricate ever smaller features lithographically on planar semiconductor platforms. In recent years, this has been slowing down due to the myriad of problems in short channel CMOS technologies. Research is now focusing on realizing Moore’s law by architectural innovation, involving novel circuits and computation paradigms. There has been intense interest and activity directed towards designing logic circuits with memory elements. This is mainly driven by ideas like in-memory compute where logic operations are performed at the memory location in order to overcome the memory-wall bottleneck. Resistive-switching random-access memory (RRAM)/ memristors has a great potential to be the future of non-volatile memory owing to its CMOS compatibility, read-write endurance, power and speed. We describe novel high speed logic circuits for adders and multipliers built with RRAM to support the concept of logic-in-memory. These circuits have significant speed/area/power improvements over the existing designs. The complexity involved in computation in terms of controlling the basic gates, sequence of operations etc. has been significantly reduced. RRAM properties are exploited with the help of a well-known analog element called current mirror. Previously known logic-implication technique to realize digital gates comes with a serious limitation of limited fan-out. By using current mirrors, this limitation can be overcome, enabling more logic operations to run in parallel. Results show that the delay for even an XOR operation can be reduced to 1 cycle, compared to the 5 cycles taken by logic implication. Spice simulations are done with known RRAM models. Simulation results show significant improvement in power consumed over the existing designs. The design of different adders and multipliers are also described. Metrics like area, power and latency are compared, and it shows significant improvement over the state-of-the-art.