A reconfiguration-based defect-tolerant design paradigm for nanotechnologies
Entering the nanometer era, a major challenge to current design method ologies and tools is how to eﬀectively address the high defect densities pro jected for emerging nanotechnologies. To this end, in this dissertation we propose a reconﬁguration-based defect-tolerant design paradigm for defect prone nanoelectronic technologies. In our paradigm, designs are mapped into a nanofabric comprised of reconﬁgurable regions, architected using a suitable hierarchy of design abstractions, so as to meet the target yield with best ex pected performance. The new design goal is thus to devise an appropriate structural/behavioral decomposition which improves scalability by constrain ing the defect mapping and reconﬁguration process to small fabric regions, while meeting a desired probability of successful instantiation, i.e., yield. A key feature of our proposed nanofabric architecture is that it en ables the defect mapping and conﬁguration tasks to be performed within the nanofabric itself, eliminating the costly per-chip oﬄine processing. Speciﬁcally, we have devised a novel group testing method that can systematically identify defective components and/or connectivity in a fabric region. It enables the entire fabric to be tested and conﬁgured in a scalable way, using a relatively small number of easily conﬁgured triple-modular-redundancy (TMR) test tiles executing concurrently on diﬀerent regions of the target nanofabric. Moreover, our proposed design paradigm oﬀers a rich framework in which critical trade-oﬀs among performance, yield, and complexity can be explored. The probabilistic nature of these tradeoﬀs has required us to in troduce a new class of ‘reliability-aware’ high-level synthesis (HLS) problems. In particular, rather than carefully optimizing a single (‘deterministic’) solu tion, as done in traditional HLS, our approach requires the joint synthesis and optimization of a suﬃciently large family of alternative solutions, so as to achieve the speciﬁed target yield, with best-expected performance. We have developed a Reliability-Aware Synthesis framework for NANOfabrics (RAS NANO), aimed at systematically solving this new class of ‘reliability-aware’ HLS problem. It enables designers to eﬀectively explore the complex prob abilistic design space associated with the new reconﬁguration-based defect tolerant design paradigm.