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dc.contributor.advisorBurger, Douglas C., Ph. D.en
dc.creatorDesikan, Rajagopalanen
dc.date.accessioned2008-08-28T22:47:48Zen
dc.date.available2008-08-28T22:47:48Zen
dc.date.issued2005en
dc.identifierb61214905en
dc.identifier.urihttp://hdl.handle.net/2152/2414en
dc.descriptiontexten
dc.format.mediumelectronicen
dc.language.isoengen
dc.rightsCopyright is held by the author. Presentation of this material on the Libraries' web site by University Libraries, The University of Texas at Austin was made possible under a limited license grant from the author who has retained all copyrights in the works.en
dc.subject.lcshComputer architectureen
dc.subject.lcshHigh performance computingen
dc.titleDistributed selective re-execution for EDGE architecturesen
dc.description.departmentElectrical and Computer Engineeringen
dc.identifier.oclc71330231en
dc.type.genreThesisen
thesis.degree.departmentElectrical and Computer Engineeringen
thesis.degree.disciplineElectrical and Computer Engineeringen
thesis.degree.grantorThe University of Texas at Austinen
thesis.degree.levelDoctoralen
thesis.degree.nameDoctor of Philosophyen


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