Impact of interconnect scaling on electromigration and stress migration reliability
Abstract
Interconnect scaling has given rise to serious reliability concerns under the impact
of low k integration, new processes, and shrinking dimensions. This dissertation attempts
to explore the scaling effects on the two main reliability issues in Cu metallization:
electromigration (EM) and stress migration. The EM lifetime characteristics were studied
on dual damascene Cu/low k interconnect structures for different low k dielectrics with
scaling of the metal line width and barrier thickness. A Monte Carlo simulation was used
to deduce the statistical parameters for intrinsic EM failures and extrinsic early failures. It
was found that line width scaling, when accompanied by corresponding via size scaling,
caused an almost linear decrease in the intrinsic EM lifetime, indicating the presence of a
critical failure void volume, which depends on line geometry of the cathode end.
FIB/SEM and TEM analyses revealed that copper out-diffusion due to defective barrier
coverage caused lifetime degradation and line shorting. The threshold current densitylength
(jL)c product was also studied on test structures with three different barrier
thicknesses, in both electron flow directions, and processed with different processes. A 3-
D Finite Element Analysis (FEA) was employed to investigate the confinement effect
through examining the effective bulk modulus B. The change from oxide to low k
dielectrics considerably reduced B as well as the (jL)c values. However, unlike the
effective bulk modulus B, which scaled with the barrier thickness, the (jL)c product did
not demonstrate a clear trend. This can be attributed to the decreasing experimental
accuracy with a much reduced (jL)c value and the small difference in the actual
confinement due to the barrier thickness variation. Any process-related void formation at
an unfavorable location can also significantly reduce the critical failure void volume and
the (jL)c values. Stress migration measurement was performed on Kelvin structures with
different underlying metal-1 layer thicknesses and different Cu electroplating chemistries.
A lower impurity level or a thinner metal layer thickness was found to degrade the stress
migration performance. Microstructural characterization, thermal stress measurement,
and 3-D FEA modeling were performed to interpret the observed stress migration results.
And a possible failure mechanism was proposed.
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