Advanced process control and optimal sampling in semiconductor manufacturing
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Semiconductor manufacturing is characterized by a dynamic, varying environment and the technology to produce integrated circuits is always shifting in response to the demand for faster and new products, and the time between the development of a new profitable method of manufacturing and its transfer to tangible production is very short. The semiconductor industry has adopted the use of advanced process control (APC), namely a set of automated methodologies to reach desired process goals in operating individual process steps. That is because the ultimate motivation for APC is improved device yield and a typical semiconductor manufacturing process can have several hundred unit processes, any of which could be a yield limiter if a given unit procedure is out of control. APC uses information about the materials to be processed, metrology data, and the desired output results to choose which model and control plan to employ. The current focus of APC for semiconductor manufacturers is run-to-run control. Many metrology applications have become key enablers for the conventionally labeled “value-added” processing steps in lithography and etch and are now integral parts of these processes. The economic advantage of effective metrology applications increases with the difficulty of the manufacturing process. Frequent measurement facilitates products reaching its target but it increases the cost and cycle time. If lots of measurements are skipped, the product quality does not be guaranteed due to process error from uncompensated drift and step disturbance. Thus, it is necessary to optimize the sampling plan in order to quickly identify the sources of prediction errors and decrease the metrology cost and cycle time. The goal of this research intend to understand the relationship between metrology and advanced process control (APC) in semiconductor manufacturing and develop an enhanced sampling strategy in order to maximize the value of metrology and control for critical wafer features.