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This thesis focuses on the logical design of binary adders. It covers topics extending from cardinal numbers to carry skip optimization. The conventional adder designs are described in detail, including: carry completion, ripple carry, carry select, carry skip, conditional sum, and carry lookahead. We show that the method of parallel prefix analysis can be used to unify the conventional adder designs under one parameterized model. The parallel prefix model also produces other useful configurations, and can be used with carry operator variations that are associative. Parallel prefix adder parameters include group sizes, tree shape, and device sizes. We also introduce a general algorithm for group size optimization. Code for this algorithm is available on the World Wide Web. Finally, the thesis shows the derivation for some carry operator variations including those originally given by Majerski and Ling.