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dc.contributor.advisorBanerjee, Sanjayen
dc.creatorJoshi, Sachin Vineet, 1981-en
dc.date.accessioned2011-08-23T14:56:26Zen
dc.date.available2011-08-23T14:56:26Zen
dc.date.issued2007-05en
dc.identifier.urihttp://hdl.handle.net/2152/13292en
dc.descriptiontexten
dc.description.abstractIntegration of novel materials onto silicon substrates within a conventional CMOS framework is one of the most challenging problems facing the semiconductor industry. The evaluation of various novel channel materials such as Ge, strained Si and their alternative crystal orientations for high performance MOS devices is discussed. Techniques including the use of ultra-thin dislocation blocking layers for the epitaxial growth of Ge and strained Si, direct silicon bonding (DSB) for hybrid orientation technology (HOT) and surface passivation methods for Ge channel devices were explored in an effort to improve device performance while adhering to a CMOS-like processing scheme. Devices fabricated using low thermal budget processes with deposited high-k gate insulators and metal gate electrodes yielded significant mobility enhancements for strained Si NMOSFETs, hybrid crystal orientation devices, bulk Ge PMOSFETs as well as for PMOS devices fabricated on epi Ge layers grown on (110) Si substrates. Various tradeoffs were optimized to engineer the channel region as well as source drain junctions for long channel MOSFETs. For the dislocation blocking layer technique, deep source drain implants to minimize junction leakage and an optimized strained Si layer resulted in 50% performance enhancement. In the case of DSB-HOT devices, optimized junction passivation utilized to reduce reverse diode leakage by an order of magnitude. This reduction, coupled with DSB layer thickness optimization, may enable the implementation of this technology at the 45 nm node and beyond. The electrical quality of the bond interface for DSB wafers was also evaluated. An asymmetry in the forward and reverse current voltage characteristics was observed in spite of an oxide free bond interface. This asymmetry was attributed to a new type of junction formed at the (110) / (100) Si bond interface due to a valence band offset between the two different Si surfaces. Consistent with the experimental observation, density functional theory simulations also predict the existence of such a band offset. For bulk Ge devices, a thin SiOX interfacial layer was utilized to passivate the Ge / high-k interface and demonstrate a 2X enhancement over universal Si / SiO2 hole mobility.
dc.format.mediumelectronicen
dc.language.isoengen
dc.rightsCopyright is held by the author. Presentation of this material on the Libraries' web site by University Libraries, The University of Texas at Austin was made possible under a limited license grant from the author who has retained all copyrights in the works.en
dc.subjectMetal oxide semiconductors, Complementary--Design and constructionen
dc.subjectSiliconen
dc.titleNovel channel materials for Si based MOS devices : Ge, strained Si and hybrid crystal orientationsen
dc.description.departmentElectrical and Computer Engineeringen
thesis.degree.departmentElectrical and Computer Engineeringen
thesis.degree.disciplineElectrical and Computer Engineeringen
thesis.degree.grantorThe University of Texas at Austinen
thesis.degree.levelDoctoralen
thesis.degree.nameDoctor of Philosophyen


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