Characterization of growth and thermal behaviors of thin films for the advanced gate stack grown by chemical vapor deposition
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Abstract – Studies have been done on the materials for alternative gate dielectrics (high-k) and a metal gate electrode, which will replace conventional SiO2 gate dielectric and poly silicon gate electrode, for the sub100 nm CMOS technologies. Ultrathin HfO2 films prepared by chemical vapor deposition on Si(100) were annealed in high vacuum or N2 ambient at high temperature and their thermal stability was measured. Based on in-situ XPS, annealing HfO2 films grown by CVD on clean Si(100) leads to silicide formation at 950 o C for ultrahigh vacuum but not 4 Torr of N2. For an HfO2 film capped with amorphous Si, silicide does form upon annealing in 4 torr, but not 760 torr, of N2. TEM shows when hafnium silicide forms, it forms discontinuous islands. HfON thin film prepared by chemical vapor deposition on silicon substrate showed superior thermal stability compared to HfO2 thin film. X-ray photoelectron spectroscopy studies shows that HfON thin film is chemically stable in contact with silicon up to 1000 o C under high vacuum. Excellent resistance to crystallization of HfON thin film during high temperature process is proven by a glancing angle XRD. MOS devices using HfON dielectric thin film showed better electrical properties than HfO2. CVD TaN film exhibited excellent thermal stability in terms of chemical, structural, and electrical aspects. PMOS compatible work function (~5.0 eV) and the excellent electrical performance of CVD TaN gate electrode suggest that it is a promising candidate to replace p+ poly silicon for sub-100 nm CMOS technology.