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dc.creatorMudanai, Sivakumar Panneerselvam
dc.date.accessioned2011-03-28T21:59:22Z
dc.date.available2011-03-28T21:59:22Z
dc.date.created2001-08
dc.date.issued2011-03-28
dc.identifier.urihttp://hdl.handle.net/2152/10757
dc.descriptiontext
dc.description.abstractNot availableen_US
dc.format.mediumelectronic
dc.language.isoengen_US
dc.rightsCopyright is held by the author. Presentation of this material on the Libraries' web site by University Libraries, The University of Texas at Austin was made possible under a limited license grant from the author who has retained all copyrights in the works.
dc.subjectComputer engineeringen_US
dc.subjectDielectric devicesen_US
dc.titleGate current modeling through high-k materials and compact modeling of gate capacitanceen_US
dc.rights.holderRestricted
dc.description.departmentElectrical and Computer Engineeringen_US
thesis.degree.departmentElectrical and Computer Engineeringen_US
thesis.degree.disciplineElectrical and Computer Engineeringen_US
thesis.degree.grantorThe University of Texas at Austin
thesis.degree.levelDoctoralen_US
thesis.degree.nameDoctor of Philosophyen_US


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