• Hardware transactional memory : a systems perspective 

      Rossbach, Christopher John (2009-08)
      The increasing ubiquity of chip multiprocessor machines has made the need for accessible approaches to parallel programming all the more urgent. The current state of the art, based on threads and locks, requires the ...
    • Memory-subsystem resource management for the many-core era 

      Kaseridis, Dimitrios (2011-05)
      As semiconductor technology continues to scale lower in the nanometer era, the communication between processor and main memory has been particularly challenged. The well-studied frequency, memory and power ``walls'' have ...
    • Mitigating DRAM complexities through coordinated scheduling policies 

      Stuecheli, Jeffrey Adam (2011-05)
      Contemporary DRAM systems have maintained impressive scaling by managing a careful balance between performance, power, and storage density. In achieving these goals, a significant sacrifice has been made in DRAM's operational ...
    • Nearly free resilient memory architectures that balance resilience, performance, and cost 

      Kim, Dong Wan; 0000-0002-0784-923X (2017-08-29)
      Memory reliability has been a major design constraint for mission-critical and large-scale systems for many years. Continued innovation is still necessary because the rate of faults, and the errors they lead to, grows with ...