• DRAM-aware prefetching and cache management 

    Lee, Chang Joo, 1975- (2010-12)
    Main memory system performance is crucial for high performance microprocessors. Even though the peak bandwidth of main memory systems has increased through improvements in the microarchitecture of Dynamic Random Access ...
  • Exploiting long-term behavior for improved memory system performance 

    Jain, Akanksha; 0000-0002-9048-1017 (2016-08-16)
    Memory latency is a key bottleneck for many programs. Caching and prefetching are two popular hardware mechanisms to alleviate the impact of long memory latencies, but despite decades of research, significant headroom ...
  • Fair and high performance shared memory resource management 

    Ebrahimi, Eiman (2011-12)
    Chip multiprocessors (CMPs) commonly share a large portion of memory system resources among different cores. Since memory requests from different threads executing on different cores significantly interfere with one ...