• Three-dimensional gate-wrap-around field-effect transistor 

      Lee, Jack C.; Xue, Fei (United States Patent and Trademark Office, 2015-06-02)
      A three-dimensional Gate-Wrap-Around Field-Effect Transistor (GWAFET). The GWAFET includes a substrate of III-V semiconductor material. The GWAFET further includes one or more channel layers with a gate wrapped around these ...
    • Vertical III-V nanowire field-effect transistor using nanosphere lithography 

      Lee, Jack C.; Xue, Fei (United States Patent and Trademark Office, 2015-12-08)
      A vertical III-V nanowire Field-Effect Transistor (FET). The FET includes multiple nanowires or nanopillars directly connected to a drain contact, where each of the nanopillars includes a channel of undoped III-V semiconductor ...