Browsing by Subject "Thin-film transistor"

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Carbon nanotube thin film transistor on flexible substrate and its applications as switches in a phase shifter for a flexible phased-array antenna
(2010-12) Pham, Daniel Thanh Khac; Chen, Ray T.; Akinwande, Deji; Bank, Seth; Chen, Maggie; Ho, Paul; Subbaraman, Harish
In this dissertation, a carbon nanotube thin-film transistor is fabricated on a flexible substrate. Combined printing and stamping techniques are used for the fabrication. An ink-jet printing technique is used to form the gate, source, and drain electrodes as well as the dielectric layer. A self aligned carbon nanotube (CNT) thin film is formed by using a new modified dip coat technique before being transferred to the device substrate. This novel modified dip-coat technique utilizes the capillary effect of a liquid solution rising between gaps to coat CNT solution on a large area of the substrate while consuming minimal CNT solution. Several key solutions are addressed to solve the fabrication problems. (1) The source/drain contact with the CNT channel is developed by using droplets of silver ink printed on the source/drain areas prior to applying CNT thin. The wet silver ink droplets allow the silver to "wet" the CNT thin-film area and enable good contact with the source and drain contact after annealing. (2) A passivation layer to protect the device channel is developed by bonding a thin Kapton film on top of the device channel. This thin Kapton film is also used as the media for transferring the aligned CNT thin-film on the device substrate. Using this technique, printing the passivation layer can be avoided, and it prevents the inter-diffusion of the liquid dielectric into the CNT porous thin-film. (3) A simple and cost effective technique to form multilayer metal interconnections on flexible substrate is developed and demonstrated. Contact vias are formed on the second substrate prior bonding on the first substrate. Ink-jet printing is used to fill the silver ink into the via structure. The printed silver ink penetrates through the vias to contact with the contact pads on the on the bottom layer, followed by an anneal process. High drain current of 0.476mA was obtained when V[subscript G]= -3V and source-drain voltage (V[subscript DS]) was -1.5V. A bending test was performed on the CNT TFT showing less than a 10% variation in performance. A bending test was also performed on via structures, which yielded less than a 5% change in resistance. The developed CNT TFT is used to form a switch in a phase shifter for a flexible phased-array antenna (PAA). Four element 1-dimensional and 2-dimensional phased-array antennae are fabricated and characterized. Multilayer metal interconnects were used to make a complete PAA system. For a 2-bit 1x4 PAA system, by controlling the ON/OFF states of the transistors, beam steering of a 5.3GHz signal from 0° to -27° has been demonstrated. The antenna system also shows good stability and tolerance under different bending radii of curvature. A 2-bit 2x2 PAA system was also fabricated and demonstrated. Two dimensional beam steering of a 5.2GHz signal at an angle of [theta]=20.7° and [phi]=45° has been demonstrated. The total efficiency of the 1-dimensional and 2-dimensional PAA systems are 42% and 46%, respectively.
Nanostructuring approaches to altering and enhancing performance characteristics of thin-film transistors
(2022-09-01) Liang, Kelly (Ph. D. in electrical and computer engineering); Dodabalapur, Ananth, 1963-; Yu, Edward T; Incorvia, Jean Anne; Sreenivasan, S. V.; Page, Zachariah A
Nanostructured thin-film transistor (TFT) designs and approaches in this work have been shown to enhance transistor characteristics across many semiconductor materials. We highlight two nanostructuring approaches, including nanostripe patterning of the transistor channel and nanospike patterning of the source and drain electrodes. Both nanostructuring techniques are shown to alter and improve transistor performance by (i) enhancing gate control which improves subthreshold characteristics, (ii) enhancing electric fields and carrier concentrations near the source contact to improve carrier injection, and (iii) redistributing the carrier concentrations within the channel resulting in enhanced concentrations in narrow channels designated as charge nanoribbons. Nanostripe-patterning of semiconductor channels was studied with technology computer-assisted design (TCAD) software and shown to enhance transistor drive currents over unpatterned channels by greater than a factor of 11 and showed that the nanostripe patterning of the semiconductor channel resulted in reduced short channel effects and significantly improved gate control. The advantages of nanostripe channel patterning were also demonstrated experimentally and showed enhancement of carrier mobility by a factor of 2. Nanospike-patterning of the metal source and drain electrode TFTs were also explored and shown, through experimental studies and simulation studies, to substantially improve the performance of TFTs, especially at short channel lengths and also below threshold. Inspired by field emission contacts and our nanostripe work, the sharp tip of the nanospike electrodes focus electric fields and produces field-emission enhanced carrier injection from the nanospike source and drain contacts, leading to higher drive currents, carrier densities, and carrier velocities. Nanospike electrodes also facilitate quasi-three-dimensional gate control, especially at low gate voltage conditions. This leads to significantly improved subthreshold characteristics and reduced subthreshold dependence on drain voltage, especially at short channel lengths. While nanospike electrode TFTs do not have physically patterned semiconductor regions as nanostripe TFTs, nanospike electrode TFTs also form charge nanoribbons at high drain voltages which similarly facilitates superior gate control over the full channel. Both nanostripe semiconductor TFTs and nanospike electrode TFTs are promising approaches that are compatible with many thin-film semiconductor materials, fabrication methods, and design strategies. These nanostructuring strategies can improve processing speed and performance while reducing power consumption when applied to flexible electronic systems or in back-end-of-the-line circuits.
Thin-film transistor circuits based on inkjet printed single-walled carbon nanotubes and zinc tin oxide
(2015-12) Kim, Bongjun; Dodabalapur, Ananth, 1963-; Akinwande, Deji; Chen, Ray; Lee, Jack; Viswanathan, T. R.; Yu, Guihua
Recently, various novel functional materials and low-cost device fabrication techniques have emerged in the field of thin-film electronics. Active semiconductors in the form of thin-films are one of the critical components in thin-film transistors (TFTs) to achieve high-performance large-area electronics. Semiconducting single-walled carbon nanotubes (SWCNTs) and amorphous zinc tin oxide (ZTO) are considered to be some of the most promising semiconductors for TFTs due to their advantages such as high electrical performance, air-stability, and optical transparency. In this dissertation, SWCNTs and ZTO are employed as p-channel/ambipolar and n-channel semiconductors in TFTs, respectively, and integrated into various circuits through use of the cost-effective inkjet printing technique. High-performance p-channel TFTs are demonstrated by using single-pass inkjet printing of SWCNTs. Dense uniform networks of SWCNTs are formed in the channel of TFTs with single-pass printing after application of UV O3 treatment on the dielectric surface for suitable surface energy modification. By employing these SWCNT TFTs for p-TFTs along with ZTO n-TFTs, high-speed complementary circuits are demonstrated with low power consumption. The material combination of high-performance inkjet printed n- and p-channel semiconductors results in the fastest ring oscillators (ROSCs) among previously reported ROSCs where printed semiconductors were utilized. Furthermore, adding additional top-gate dielectric and top-gate electrode layers on top of the ROSCs can impart new functionalities that can be used to control the oscillation frequency of the ROSCs linearly with applied top-gate bias. Various basic circuits are also demonstrated by using inkjet printed ambipolar semiconductors. SWCNTs and ZTO, employed as p- and n-channel semiconductors for individual TFTs, turn into an ambipolar semiconductor when they are printed in a bilayer heterostructure. The bilayer ambipolar TFTs show high electron and hole mobilities in air, and ROSCs based on the ambipolar TFTs show the fastest oscillation frequency among the best reported ambipolar TFT-based ROSCs. Ambipolar SWCNT circuits are also demonstrated by encapsulating SWCNTs with aluminum oxide (Al2O3) layer deposited by atomic layer deposition (ALD). These ambipolar circuits are realized on flexible plastic substrates with inkjet printed electrodes, and show high operational and environmental stability.