Browsing by Subject "Flexible electronics"

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Black phosphorus thin-film transistors : from strain tunability to high frequency applications
(2017-08-10) Zhu, Weinan; Akinwande, Deji; Lu, Nanshu; Lee, Jack; Shi, Li; Bank, Seth
Flexible smart systems with functionalities of sensing and wireless communication have ignited worldwide interest. The main driving force behind this is the concept of Internet of Things (IoT), where the world is reshaped via digitalizing and connecting billions of smart devices. In this dissertation, we report on our research to advance the understanding and development of two-dimensional semiconductors for high performance robust flexible nano electronics and smart nano systems. Our interdisciplinary research approach involves nano characterizations, nano fabrication integrations, device physics, circuits, and thin-film mechanics. Specifically, this dissertation is composed with detailed discussion on following experimental works. In chapter 2, we discussed the ambient degradation of few layer black phosphorus (BP) and the development of effective dielectric encapsulation methodology for enhancing the air stability. In chapter 3, we presented the first few layer BP based flexible thin-film transistors and the circuit units realized from single and double BP TFTs. In addition, strong mechanical robustness was validated for the fully functional BP amplitude modulated AM demodulator. In chapter 4, we reported the first few layer BP flexible radio frequency (RF) transistor with cut-off frequency ~20 GHz, which successfully expanded the application scenario of 2D RF devices. In chapter 5, a polymer low-k dielectric based highly stretchable substrate was developed for investigating the strain tunabilities of 2D semiconductors. For few layer BP, thickness dependence in the angle-resolved Raman intensity evolvement under tensile strain was reported the first time.
Carbon nanotube thin film transistor on flexible substrate and its applications as switches in a phase shifter for a flexible phased-array antenna
(2010-12) Pham, Daniel Thanh Khac; Chen, Ray T.; Akinwande, Deji; Bank, Seth; Chen, Maggie; Ho, Paul; Subbaraman, Harish
In this dissertation, a carbon nanotube thin-film transistor is fabricated on a flexible substrate. Combined printing and stamping techniques are used for the fabrication. An ink-jet printing technique is used to form the gate, source, and drain electrodes as well as the dielectric layer. A self aligned carbon nanotube (CNT) thin film is formed by using a new modified dip coat technique before being transferred to the device substrate. This novel modified dip-coat technique utilizes the capillary effect of a liquid solution rising between gaps to coat CNT solution on a large area of the substrate while consuming minimal CNT solution. Several key solutions are addressed to solve the fabrication problems. (1) The source/drain contact with the CNT channel is developed by using droplets of silver ink printed on the source/drain areas prior to applying CNT thin. The wet silver ink droplets allow the silver to "wet" the CNT thin-film area and enable good contact with the source and drain contact after annealing. (2) A passivation layer to protect the device channel is developed by bonding a thin Kapton film on top of the device channel. This thin Kapton film is also used as the media for transferring the aligned CNT thin-film on the device substrate. Using this technique, printing the passivation layer can be avoided, and it prevents the inter-diffusion of the liquid dielectric into the CNT porous thin-film. (3) A simple and cost effective technique to form multilayer metal interconnections on flexible substrate is developed and demonstrated. Contact vias are formed on the second substrate prior bonding on the first substrate. Ink-jet printing is used to fill the silver ink into the via structure. The printed silver ink penetrates through the vias to contact with the contact pads on the on the bottom layer, followed by an anneal process. High drain current of 0.476mA was obtained when V[subscript G]= -3V and source-drain voltage (V[subscript DS]) was -1.5V. A bending test was performed on the CNT TFT showing less than a 10% variation in performance. A bending test was also performed on via structures, which yielded less than a 5% change in resistance. The developed CNT TFT is used to form a switch in a phase shifter for a flexible phased-array antenna (PAA). Four element 1-dimensional and 2-dimensional phased-array antennae are fabricated and characterized. Multilayer metal interconnects were used to make a complete PAA system. For a 2-bit 1x4 PAA system, by controlling the ON/OFF states of the transistors, beam steering of a 5.3GHz signal from 0° to -27° has been demonstrated. The antenna system also shows good stability and tolerance under different bending radii of curvature. A 2-bit 2x2 PAA system was also fabricated and demonstrated. Two dimensional beam steering of a 5.2GHz signal at an angle of [theta]=20.7° and [phi]=45° has been demonstrated. The total efficiency of the 1-dimensional and 2-dimensional PAA systems are 42% and 46%, respectively.
Chemical vapor deposited two-dimensional material based high frequency flexible field-effect transistors
(2018-06-20) Park, Saungeun; Akinwande, Deji; Banerjee, Sanjay K.; Shi, Li; Register, Leonard F.; Dodabalapur, Ananth
Flexible nanoelectronics have attracted great attention due to interesting concepts such as wearable electronics and internet of things, which requires high speed and low power consumption flexible smart system with functions ranging from sensing, computing to wireless communicating. In this dissertation, transparent and solution processable nanoscale polyimide film for highly flexible gate dielectrics is demonstrated by in-situ opto-electro-mechanical measurement and utilized for two-dimensional nanomaterials based field-effect transistors (FETs). Graphene thin film transistor with the nanoscale polyimide dielectric on flexible glass is operated in extremely high frequency regime and shows the highest experimental saturation velocity (~8.4 × 10⁶ cm/s) in any materials in any flexible transistors. Molybdenum disulfide (MoS₂) based transistors with embedded gate structure on rigid substrate are demonstrated with enhancement mode operation, ON/OFF ratio over 10⁸, the highest transconductance (~ 70 µS/µm) and saturation velocity (~1.8 × 10⁶ cm/s). CVD MoS₂ FETs on flexible plastic substrates are also demonstrated, showing enhancement mode operation, ON/OFF radio over 10¹⁰ and transconductance (~6 µS/µm). The flexible CVD MoS₂ transistors with embedded gate structure were employed to study effects of substoichiometric doping by HfO [subscript 2-x]. After the doping layer, the flexible MoS₂ transistors show ×8 higher source-drain current density as well as more than ×2 mobility improvements. For the another first demonstration, GHz operation and flexibility of graphene and MoS₂ based FETs are realized on commercial available paper substrates, which indicates flexible two-dimensional material based nanoelectronics can be implemented on paper substrates for systems, sensors, and Internet of Things.
Device physics and device mechanics for flexible MoS2 thin film transistors
(2015-08) Chang, Ph. D., Hsiao-Yu; Akinwande, Deji; Lu, Nanshu; Lee, Jack; Lai, Keji; Dodabalapur, Ananth
While there has been increasing studies of MoS2 and other two-dimensional (2D) semiconducting dichalcogenides on hard conventional substrates, experimental or analytical studies on flexible substrates has been very limited so far, even though these 2D crystals are understood to have greater prospects for flexible smart systems. In the first part, we report detailed studies of MoS2 transistors on industrial plastic sheets. Failure mechanisms under strain are studied with bending test and stretching test. Experimental investigation identifies that crack formation in the dielectric and the buckling delamination in MoS2 are responsible for the degradation of the device performance. Several approaches to improve device flexibility were discussed. In the second part, electronic transport properties in multilayer MoS2 are investigated with Y-function method. By combining experiments and analysis, we show that the Y-function method offers a robust route for evaluating the low-field mobility, threshold voltage and contact resistance even when the contact is a Schottky-barrier as is common in two-dimensional transistors. In addition, an independent transfer length method (TLM) evaluation corroborates the modified Y-function analysis. The last part, we demonstrate the first RF performance for transferred CVD-grown MoS2 FETs on the flexible substrate. Our result suggests that the large-area CVD-grown MoS2 provides a practical route to realize low-power, high speed electronics circuit applications in the future.
Electrically active microfluidic fibers
(2019-06-21) Chen, Boxue; Wang, Zheng, Ph. D.; Ho, Paul S; Lu, Nanshu; Zheng, Yuebing; Yu, Edward T
In recent years, novel materials processing techniques involving PDMS and paper materials have enabled revolutionary progress in performance and capability of chip-scale microfluidics. However, microfluidic systems remain largely single-chip constructs, and are far from the level of sophistication that is typically seen in multi-chip multi-board electronic systems. A major limitation lies in the fluidic chip-to-chip interconnects, where the simple tubing materials and structures lack the pumping and monitoring functionalities that are needed in reliable microfluidic systems. In this dissertation, we address these challenges with the new structures and materials made available by multimaterial fiber processes, which have recently emerged as a materials platform for a variety of sensing modalities. Various functionalities, such as flow actuators or sensors, are integrated into multimaterial fibers for functional chip feedlines. Integrated fiber pumps are enabled by electrowetting-on-dielectric (EWOD) actuation to precisely manipulate liquid flow. Fiber drawing process allows creating an ultra-thin and uniform dielectric layer, and hence achieving rapid flow response and predictable flow behaviors. Fiber thermal flow sensors, on the other hand, take the advantage of ultra-fast heat transfer at microscale to break the fundamental trade-off between sensitivity, pressure drop, measurement range, and temperature rise in conventional thermal flow sensors. Record-setting flowrate sensitivity was demonstrated over a wide measurement range and unprecedentedly low pressure drop. As a natural extension to the project of fiber flow sensors, we also present the theoretic optimization of geometric and segmentation design of fiber flow sensors to further boost sensitivity and extend measurement range. A new two-segment structure was demonstrated in simulation with greatly extended measurement range and much simpler post-drawing process. At last, we proposed a general strategy for distributed sensing, which was later applied to present distributed flow sensors. Sub-cm spatial resolution was demonstrated in simulations. Taken as a whole, electrically active microfluidic fibers take advantage of novel materials and new device structures that deliver new functionality and significant improvements in performance. This unconventional form of devices paves the way towards a complete functional overhaul of microfluidics feed lines needed in large-scale multi-chip integration in microfluidics and opens new possibilities in lab-on-fiber technologies.
Experimental and theoretical investigations of thermal transport in graphene
(2015-08) Sadeghi, Mir Mohammad; Shi, Li, Ph. D.; Murthy, Jayathi; Howell, John; Wang, Yaguo; Akinwande, Deji; Yao, Zhen
Graphene has been actively investigated because its unique structural, electronic, and thermal properties are desirable for a number of technological applications ranging from electronic to energy devices. The thermal transport properties of graphene can influence the device performances. Because of the high surface to volume ratio and confinement of phonons and electrons, the thermal transport properties of graphene can differ considerably from those in graphite. Developing a better understanding of thermal transport in graphene is necessary for rational design of graphene-based functional devices and materials. It is known that the thermal conductivity of single-layer graphene is considerably suppressed when it is in contact with an amorphous material compared to when it is suspended. However, the effects of substrate interaction in phonon transport in both single and multi-layer graphene still remains elusive. This work presents sensitive in-plane thermal transport measurements of few-layer and multi-layer graphene samples on amorphous silicon dioxide with the use of suspended micro-thermometer devices. It is shown that full recovery to the thermal conductivity of graphite has yet to occur even after the thickness of the supported multi-layer graphene sample is increased to 34 layers, which is considerably thicker than previously thought. This surprising finding is explained by the long intrinsic scattering mean free paths of phonons in graphite along both the basal-plane and cross-plane directions, as well as partially diffuse scattering of phonons by the graphene-amorphous support interface, which is treated by an interface scattering model developed for highly anisotropic materials. In addition, an experimental method is introduced to investigate electronic thermal transport in graphene and other layered materials through the measurement of longitudinal and transverse thermal and electrical conductivities and Seebeck coefficient under applied electric and magnetic fields. Moreover, this work includes an investigation of quantitative scanning thermal microscopy measurements of electrically biased graphene supported on a flexible polyimide substrate. Based on a triple scan technique and another zero heat flux measurement method, the temperature rise in flexible devices is found to be higher by more than one order of magnitude, and shows much more significant lateral heat spreading than graphene devices fabricated on silicon.
Flexible antenna arrays and transistor devices fabricated using inkjet printing techniques
(2019-06-21) Grubb, Peter Mack; Chen, Ray T.; Akinwande, Deji; Vishwanath, Sriram; Pan, Zhigang; Li, Wentao
This dissertation reports several improvements to the current state of the art in inkjet printed electronics, including new material formulations and new techniques which allow for smaller negative dimensions than had previously been reported. These new techniques and materials are used to produce several different types of devices on flexible substrates, including a new type of printed array antenna called the frequency scanning array as well as both high performance and high throughput producible transistors. The experiences of building these devices are then used to synthesize potential approaches to integrating the unique advantages of printed electronics into conventional IC manufacturing processes. This arc from material development, to device development, and finally process improvement represents a complete holistic approach to the production of flexible printed electronics devices.
Graphene and its use in flexible electronics
(2016-08) Wang, Xiaohan, Ph. D.; Willson, C. G. (C. Grant), 1939-; Akinwande, Deji; Ekerdt, John G.; Bonnecaze, Roger T.; Banerjee, Sanjay K.
Graphene, a single layer of sp2 hybridized carbon atoms, was first isolated from graphite in 2004. It is the thinnest material known, but it is exceedingly strong, light and flexible. It conducts heat better than diamond, and may conduct electricity better than silver. This unique combination of properties makes graphene an ideal platform for flexible electronics. In the last decade, much effort has been devoted to synthesize graphene and then place (also known as “transfer”) it onto a flexible substrate for device applications. However, a large-scale and cost-effective method to accomplish this is missing, which limits the use of graphene in high-performance electronics. This dissertation reports an improved graphene synthesis. Oxygen on the catalytic copper surface was found to play an important role in graphene nucleation and growth during the chemical vapor deposition (CVD). Control of the surface oxygen enables repeatable growth of single-crystal graphene, the quality of which is among the best of reported for CVD graphene. The electrochemical reduction of graphene oxide was also explored as an alternative graphene synthesis. This method eliminates the high-temperature treatment and is more compatible with high-volume production. After CVD synthesis, graphene needs to be transferred from the copper surface onto a target substrate for device applications. Instead of using a chemical etching method to dissolve the copper, a rapid and nondestructive method was developed to delaminate the graphene from the copper surface. This produced isolated graphene films, which can be transferred onto dielectric substrates and patterned with lithography. In the latter process, poly(methyl methacrylate) (PMMA) is usually used as an electron-beam resist. The influence of PMMA residues on graphene properties was studied and a method to remove these residues from graphene surface was developed. This cleaned graphene surface demonstrated low surface friction and improved contact with the metal electrodes, which is desirable for coating and electronic applications. Finally, the possibility for scaling up graphene production in a roll-to-roll (R2R) system was explored. The CVD graphene cracks when a relatively low applied strain (~0.44%) is applied to the copper substrate. This provides a guideline for R2R system design and ultimately helps to achieve cheaper, faster, and more powerful graphene-based flexible electronics.
Graphene field effect transistors for high performance flexible nanoelectronics
(2014-05) Lee, Jongho, active 21st century; Akinwande, Deji
Despite the widespread interest in graphene electronics over the last decade, high-performance graphene field-effect transistors (GFETs) on flexible substrates have been rarely achieved, even though this atomic sheet is widely understood to have greater prospects for flexible electronic systems. In this work, we investigate the realization of high-performance graphene field effect transistors implemented on flexible plastic substrates. The optimum device structure for high-mobility and high-bendability is suggested with experimental comparison among diverse structures including top-gate GFETs (TG-GFETs), single/multi-finger embedded-gate GFETs with high-k dielectrics (EG-highk/GFETs), and embedded-gate GFETs with hexagonal boron nitride (h-BN) dielectrics. Flexible graphene transistors with high-k dielectric afforded intrinsic gain, maximum carrier mobility of 8,000 cm²/V·s, and importantly 32 GHz cut-off frequency. Mechanical studies reveal robust transistor performance under repeated bending down to 0.7 mm bending radius whose tensile strain corresponds to 8.6%. Passivation techniques, with robust mechanical and chemical protection in order to operate under harsh environments, for embedded-gate structures are also covered. The integration of functional coatings such as highly hydrophobic fluoropolymers combined with the self-passivation properties of the polyimide substrate provides water-resistant protection without compromising flexibility, which is an important advancement for the realization of future robust flexible systems based on graphene.
Highly conductive, nanoparticulate thick films processed at low processing temperatures
(2012-08) Nahar, Manuj, 1985-; Kovar, Desiderio; Ferreira, Paulo J.; Becker, Michael F.; Keto, John W.; Bourell, David L.
Applications such as device interconnects require thick, patterned films that are currently produced by screen printing pastes consisting of metallic particles and subsequently sintering the films. For Ag films, achieving adequate electrical conductivity requires sintering temperatures in excess of 700˚C. New applications require highly conductive films that can be processed at lower processing temperatures. Although sintering temperatures have been reduced by utilizing finer nanoparticles (NPs) in place of conventional micron-size particles (MPs), realization of theoretically achievable sintering kinetics is yet to be achieved. The major factors that inhibit NP sintering are 1) the presence of organic molecules on the NP surfaces, 2) the dominance of the non-densifying surface diffusion over grain boundary or lattice diffusion 3) agglomeration of NPs, and 4) low initial density of the NPs. Here, we report a film fabrication technique that is capable of eliminating these deleterious factors and produces near fully dense Ag films that exhibit an order of magnitude higher conductivity when compared to other film fabrication techniques at processing temperatures of 150 – 250 °C. The observed results establish the benefits of NP diffusion kinetics to be far more profound when the deleterious factors to sintering are eliminated. The sintering behavior exhibits two distinct temperature regimes – one above 150 ᵒC where grain boundary diffusion-dominated densification is dominant and one below 100 ᵒC where surface diffusion-dominated coarsening is dominant. An analytical model is developed by fitting the experimental data to the existing models of simultaneous densification and grain growth, and combining this model with existing models of the dependence of conductivity on grain boundary scattering and pore scattering. The combined model successfully describes the evolution of density, grain size and conductivity of nanoparticulate films as a function of annealing treatment, with reasonable accuracy. The model was also used to evaluate the effect of initial NP size and initial relative density of films on the final sintered properties and conductivity of films.
Hybrid Response Pressure Sensors as an Electronic Skin for Bio- Sensing and Soft Robotics
(2022-05) Ha, Kyoungho; Lu, Nanshu; Cullinan, Michael; Sirohi, Jayant; Yu, Guihua
Soft pressure sensors are critical components of e-skins, which are playing an increasingly significant role in two burgeoning fields: soft robotics and bio-electronics. Capacitive pressure sensors are popular given their mechanical flexibility, high sensitivity, and signal stability. After two decades of rapid development, e-skins based on soft capacitive pressure sensors are able to achieve human-skin-like softness and sensitivity. However, there remain two major roadblocks in the way of the practical application of soft capacitive pressure sensors: 1) the decay of sensitivity with increased pressure and 2) the coupled response between in-plane stretch and out-of-plane pressure. This dissertation aims to tackle the two critical challenges. To increase the sensitivity of a capacitive pressure sensor, past research has mostly focused on developing dielectric layers with surface/porous structures or higher dielectric constants. However, such strategies have only been effective in improving sensitivities at low pressure ranges (e.g. up to 3 kPa). To overcome this well-known obstacle, I devised a flexible hybrid response pressure sensor (HRPS) composed of an electrically conductive porous nanocomposite (PNC) laminated with an ultrathin dielectric layer. Using a nickel foam template, the PNC was fabricated with carbon nanotubes (CNT) doped Ecoflex to be 86% porous and electrically conductive. The PNC exhibits hybrid piezoresistive and piezocapacitive responses, resulting in significantly enhanced sensitivities (i.e., more than 400%) over wide pressure ranges, from 3.13 kPa⁻¹ within 0-1 kPa to 0.43 kPa⁻¹ within 30-50 kPa. The effect of the hybrid responses was differentiated from the effect of porosity or high dielectric constants by comparing the HRPS with its purely piezocapacitive counterparts. Fundamental understanding of the HRPS and the prediction of optimal CNT doping were achieved through simplified analytical models. Second, coupled pressure and stretching responses disable capacitive sensors to differentiate out-of-plane and in-plane inputs. Due to this critical limitation, intrinsically stretchable and accurate capacitive pressure sensors have not been successfully demonstrated, while other types of soft sensors have already achieved stretchability beyond flexibility. To discriminate the compression and stretching responses, I proposed a stretchable hybrid response pressure sensor (SHRPS). SHRPS is a stretchable version of HRPS, whose sensitive pressure response trivializes the stretching response and enables the SHRPS to accurately read applied pressure even under stretching. Analytical models for conventional capacitive pressure sensors, HRPS and SHRPS have been developed and provide fundamental electromechanical understanding for the difference among the three. As a demonstration, a 3 x 3 SHPRS array has been glued to an inflatable manipulator which is capable of diverse tasks such as pulse palpation and object grabbing given the tunable inflation. A perspective for the future directions of HRPS is provided at the end of the dissertation.
Modular and reconfigurable wireless e-tattoo platform for mobile physiological sensing
(2019-05-13) Jeong, Hyoyoung; Lu, Nanshu; Valvano, Jonathan W.; Neikirk, Dean P.; Sun, Nan; Xie, Chong
Moving from traditional healthcare methods of monitoring biometrics to an individualized wearable modality promises to reduce healthcare expenses and to present better values to the end-user. Over the past few years, ultrathin and ultrasoft epidermal electronics (a.k.a. e-tattoos) have emerged as the next generation wearables. Considering health monitoring’s unlimited potential applications in telemedicine, performance tracking, human-machine interface (HMI), and personalized mobile health, it is paramount to develop more affordable, dependable, and unobstructive biometric monitoring methods compared to current expensive and confining systems. However, it is impossible to build an all-purpose e-tattoo that can accommodate such a wide range of applications, and e-tattoos are only practically useful when they can operate wirelessly. Thus, I report the design, fabrication, and validation of modular and reconfigurable wireless e-tattoos for personalized physiological sensing. Such modular e-tattoos are comprised of a multilayer stack of stretchable layers featuring distinct functionalities: a) a near field communication (NFC) layer capable of wireless power harvesting and data transmission, or battery charging, b) Bluetooth (BT) long-distance data transmission, c) functional circuit layers, d) a passive electrode/sensor layer. These layers can be disassembled and swapped out multiple times to form custom e-tattoos with user-specified sensing capabilities. To implement such flexible e-tattoos, I invent a “cut-solder-paste” microfabrication method which is rapid-prototyped via a dry, digital and cost-effective freeform manufacture process. The mechanical strain and strain-dependent characteristics of the stretchable antenna have been analyzed by finite element method (FEM). I also demonstrate reconfigurability of such modular e-tattoos so that they can be disassembled and reassembled multiple times. Multimodal e-tattoos are stretchable by up to 20% and capable of wirelessly measuring skin hydration, skin temperature, oxygen saturation level (SpO₂), heart rate, electrocardiogram (ECG), seismocardiogram (SCG) and body motion, also estimating continuous real-time blood pressure (BP). Moreover, I report a novel magnetic field repeater (feeding coil) on clothes by leveraging embroidery method and wireless capability. Utilizing this engineering framework, it enables not only more dependable and long-term but also continuous and real-time ambulatory monitoring of a variety of biometrics. I believe that this platform opens the door for accessible, and affordable personalized healthcare monitoring in the near future.
Nanostructuring approaches to altering and enhancing performance characteristics of thin-film transistors
(2022-09-01) Liang, Kelly (Ph. D. in electrical and computer engineering); Dodabalapur, Ananth, 1963-; Yu, Edward T; Incorvia, Jean Anne; Sreenivasan, S. V.; Page, Zachariah A
Nanostructured thin-film transistor (TFT) designs and approaches in this work have been shown to enhance transistor characteristics across many semiconductor materials. We highlight two nanostructuring approaches, including nanostripe patterning of the transistor channel and nanospike patterning of the source and drain electrodes. Both nanostructuring techniques are shown to alter and improve transistor performance by (i) enhancing gate control which improves subthreshold characteristics, (ii) enhancing electric fields and carrier concentrations near the source contact to improve carrier injection, and (iii) redistributing the carrier concentrations within the channel resulting in enhanced concentrations in narrow channels designated as charge nanoribbons. Nanostripe-patterning of semiconductor channels was studied with technology computer-assisted design (TCAD) software and shown to enhance transistor drive currents over unpatterned channels by greater than a factor of 11 and showed that the nanostripe patterning of the semiconductor channel resulted in reduced short channel effects and significantly improved gate control. The advantages of nanostripe channel patterning were also demonstrated experimentally and showed enhancement of carrier mobility by a factor of 2. Nanospike-patterning of the metal source and drain electrode TFTs were also explored and shown, through experimental studies and simulation studies, to substantially improve the performance of TFTs, especially at short channel lengths and also below threshold. Inspired by field emission contacts and our nanostripe work, the sharp tip of the nanospike electrodes focus electric fields and produces field-emission enhanced carrier injection from the nanospike source and drain contacts, leading to higher drive currents, carrier densities, and carrier velocities. Nanospike electrodes also facilitate quasi-three-dimensional gate control, especially at low gate voltage conditions. This leads to significantly improved subthreshold characteristics and reduced subthreshold dependence on drain voltage, especially at short channel lengths. While nanospike electrode TFTs do not have physically patterned semiconductor regions as nanostripe TFTs, nanospike electrode TFTs also form charge nanoribbons at high drain voltages which similarly facilitates superior gate control over the full channel. Both nanostripe semiconductor TFTs and nanospike electrode TFTs are promising approaches that are compatible with many thin-film semiconductor materials, fabrication methods, and design strategies. These nanostructuring strategies can improve processing speed and performance while reducing power consumption when applied to flexible electronic systems or in back-end-of-the-line circuits.
Quick-fabrication epidermal electronic heater with on-site temperature feedback control
(2016-05-16) Stier, Andrew Clayton; Lu, Nanshu; Diller, Kenneth
Smart wearable heaters can serve many important roles in the medical field, including thermal joint therapy, controlled transdermal drug delivery, and perioperative warming. Currently existing heaters are too bulky, rigid, or difficult to control to be used as wearable and mobile devices. There has been progress in the development of stretchable, conformable heaters, but they currently take significant time to produce. Also, they all lack sufficient temperature feedback control, which is necessary to accommodate the dynamic temperatures of the human epidermis and prevent burning. We present a cost-effective epidermal electronic heater that can be produced by the cut-and-paste method and has autonomous temperature control using on-site temperature feedback. The device comprises a heater layer and a resistance temperature detector (RTD) layer on a stretchable medical tape. The total thickness is less than 70 mm and the stretchability and stiffness are on par with human epidermis. We demonstrate the device’s ability to maintain specific temperatures over extended durations of time and accurately switch between different target temperatures without any prior knowledge of the relationship between power supplied to the heater and what temperature the skin will reach.
Roll-to-roll dry transfer of monolayer graphene for high-quality and flexible electronics
(2022-08-10) Hong, Nan; Li, Wei (Of University of Texas at Austin); Akinwande, Deji; Cullinan, Michael; Zheng, Yuebing
A major challenge for graphene applications is the lack of mass production technology for large-scale and high-quality graphene growth and transfer. Large-scale graphene transfer is currently limited to wet chemical etching and electrochemical delamination. These processes result in doped graphene because of chemical residues. Moreover, wet chemical etching does not allow recycling of graphene growth substrates, while generating a large amount of chemical waste. Here, a roll-to-roll (R2R) dry transfer process with speed and tension controlled simultaneously for large-scale graphene grown by chemical vapor deposition (CVD) is reported. The process is fast, controllable, and environmentally benign. It avoids chemical contamination and allows the reuse of graphene growth substrates. Graphene was dry peeled from copper foil and transferred onto polyethylene terephthalate/ethylene vinyl acetate (PET/EVA) backing layer on a R2R basis by utilizing the high adhesion energy between graphene and PET/EVA. Experiments were conducted to examine the process parameter effects and to identify the optimal process condition. The R2R dry transferred samples were used to fabricate graphene-based field-effect transistors (GFETs) on polymer. It is demonstrated that these flexible GFETs feature a near-zero doping level and a gate leakage current one to two orders of magnitude lower than those fabricated using wet-chemical etched graphene samples. Furthermore, the scalability and uniformity of the R2R dry transferred graphene is demonstrated by successfully transferring a 3x3 in² sample and measuring its field-effect mobility with 36 millimeter-scaled GFETs evenly spaced on the sample. In addition to speed and tension control, the R2R graphene dry peel process was conducted in an angle-controlled mode. The peeling angle effect was examined on the transferred graphene quality in the R2R dry transfer process. By fixing the web tensions, the peeling angle could be varied by choosing graphene samples of different widths. Instead of PET/EVA, water soluble poly vinyl alcohol (PVA) was used as the graphene backing layer for the transfer. After being peeled off the copper growth substrate, graphene was subsequently transferred onto polyimide to fabricate GFETs and strain sensors. It is demonstrated that the filed-effect mobility of large 15 mm² graphene channels surpassed 400 cm²/Vs, and that with proper peeling angle control, the graphene coverage of the dry transferred sample reached 99.5%. Tensile and fatigue tests were conducted to examine the mechanical characteristics of graphene using the strain sensors. The graphene-based strain sensors were shown to have a high gauge factor (GF) of roughly 45 at high strain levels and the performance of the sensor did not show degradation after 500 cycles of fatigue test at 1.3% strain level. Furthermore, a novel method for estimating the adhesion energy of as-grown graphene in a R2R dry transfer process was developed. An energy balance model was established to obtain the adhesion energy estimation based on web-bending measurements before and after the peeling front. It was found that the work done by external forces and the film bending effect were the two major factors in the strain energy change. The adhesion energy of the as-grown graphene on copper foil was estimated to be from 1.22 J/m² to 2.58 J/m² based on different peeling angles. This study was the first to report the adhesion energy of graphene on copper in a R2R dry transfer process. It provides a potential method for monitoring and controlling the quality of transferred graphene in the large graphene transfer process.
Silicon nanomembrane for high performance conformal photonic devices
(2013-12) Xu, Xiaochuan; Chen, Ray T.
Inorganic material based electronics and photonics on unconventional substrates have shown tremendous unprecedented applications, especially in areas that traditional wafer based electronics and photonics are unable to cover. These areas range from flexible and conformal consumer products to biocompatible medical devices. This thesis presents the research on single crystal silicon nanomembrane photonics on different substrates, especially flexible substrates. A transfer method has been developed to transfer silicon nanomembrane defect-freely onto glass and flexible polyimide substrates. Using this method, intricate single crystal silicon nanomembrane device, such as photonic crystal microcavity, has been transferred onto flexible substrates. To test the device, subwavelength grating couplers are designed and implemented to couple light in and out of the transferred waveguides with high coupling efficiency. The cavity shows a quality factor ~ 9000 with water cladding and ~30000 with glycerol cladding, which is comparable to the same cavity demonstrated on silicon-on-insulator platform, indicating the high quality of the transferred silicon nanomembrane. The device could be bended to a radius less than 15 mm. The experiments show that the resonant wavelength shifts to longer wavelength under tensile stress, while it shifts to shorter wavelength under compressive stress. The sensitivity of the cavity is ~70 nm/RIU, which is independent of bending radius. This demonstration opens vast possibilities for a whole new range of high performance, light-weight and conformal silicon photonic devices. The techniques and devices (e.g. wafer bonding, stamp printing, subwavelength grating couplers, and modulator) generated in the research can also be beneficial for other research fields.
The thermal effect of hexagonal boron nitride supports in graphene devices
(2018-12-07) Choi, David Seiji Kar Liang; Shi, Li, Ph. D.; Ho, Paul; Akinwande, Deji; Wang, Yaguo; Tutuc, Emanuel
fundamental understanding of thermal dissipation and energy transport is necessary for designing robust electronic systems and energy conversion devices. In many of these systems, minimizing the operating temperature of the working components is required for increasing the performance, lifetime, efficiency, and reliability of the device. For example, hot spots in transistors caused by the conversion of electronic energy to thermal energy has become a bottleneck in the continued scaling of microelectronics. As the demand for compact, highly conformable and mobile electronics continues to push the limit of miniaturization, these phenomena increasingly occur at the nanoscale. At these length scales, the governing physical principles differ from classical laws based on continuum mechanics and instead require a quantum mechanical treatment. The thermal transport properties of traditional three-dimensional (3D) heat conducting materials such as the metal interconnects in nanoelectronic devices tend to degrade as the critical dimension is reduced. In contrast, the thermal properties of a new class of van der Waals-based two-dimensional (2D) materials can show different size confinement effects that can potentially be utilized for thermal management. First realized by the isolation of graphene, these materials have become attractive candidates for future-generation electronic and thermal components. Due to their atomic thinness, the properties of 2-D materials are highly sensitive to their operating environment. The studies in this dissertation therefore aim to answer critical questions surrounding the practical applicability of graphene and its dielectric isomorph hexagonal boron nitride as thermal materials in real devices. Specifically, the fundamental heat dissipation pathways of joule-heated graphene channels are inspected within the framework of silicon-based electronics as well as next-generation flexible electronic architectures. The study reveals that lateral heat spreading is essential to mitigating hot-spot formation. As a result, the inclusion of h-BN as a thermal interface material between the active graphene layer and the underlying support facilitates significant reductions in device operating temperatures due to enhanced lateral heat spreading. More than a passive thermal layer, an h-BN support increases the intrinsic thermal conductivity of graphene relative to other support materials based on an additional study in this work. An analytical solution of the phonon Boltzmann transport equation is derived to explain the observed phenomenon.
Thin-film transistor circuits based on inkjet printed single-walled carbon nanotubes and zinc tin oxide
(2015-12) Kim, Bongjun; Dodabalapur, Ananth, 1963-; Akinwande, Deji; Chen, Ray; Lee, Jack; Viswanathan, T. R.; Yu, Guihua
Recently, various novel functional materials and low-cost device fabrication techniques have emerged in the field of thin-film electronics. Active semiconductors in the form of thin-films are one of the critical components in thin-film transistors (TFTs) to achieve high-performance large-area electronics. Semiconducting single-walled carbon nanotubes (SWCNTs) and amorphous zinc tin oxide (ZTO) are considered to be some of the most promising semiconductors for TFTs due to their advantages such as high electrical performance, air-stability, and optical transparency. In this dissertation, SWCNTs and ZTO are employed as p-channel/ambipolar and n-channel semiconductors in TFTs, respectively, and integrated into various circuits through use of the cost-effective inkjet printing technique. High-performance p-channel TFTs are demonstrated by using single-pass inkjet printing of SWCNTs. Dense uniform networks of SWCNTs are formed in the channel of TFTs with single-pass printing after application of UV O3 treatment on the dielectric surface for suitable surface energy modification. By employing these SWCNT TFTs for p-TFTs along with ZTO n-TFTs, high-speed complementary circuits are demonstrated with low power consumption. The material combination of high-performance inkjet printed n- and p-channel semiconductors results in the fastest ring oscillators (ROSCs) among previously reported ROSCs where printed semiconductors were utilized. Furthermore, adding additional top-gate dielectric and top-gate electrode layers on top of the ROSCs can impart new functionalities that can be used to control the oscillation frequency of the ROSCs linearly with applied top-gate bias. Various basic circuits are also demonstrated by using inkjet printed ambipolar semiconductors. SWCNTs and ZTO, employed as p- and n-channel semiconductors for individual TFTs, turn into an ambipolar semiconductor when they are printed in a bilayer heterostructure. The bilayer ambipolar TFTs show high electron and hole mobilities in air, and ROSCs based on the ambipolar TFTs show the fastest oscillation frequency among the best reported ambipolar TFT-based ROSCs. Ambipolar SWCNT circuits are also demonstrated by encapsulating SWCNTs with aluminum oxide (Al2O3) layer deposited by atomic layer deposition (ALD). These ambipolar circuits are realized on flexible plastic substrates with inkjet printed electrodes, and show high operational and environmental stability.
Toward roll-to-roll transfer of large-scale graphene for flexible electronics fabrication
(2013-12) Xin, Hao; Li, Wei (Of University of Texas at Austin)
Graphene is a promising material for flexible electronics due to its extraordinary electrical, mechanical, and optical properties. One of the biggest challenges today is to transfer large-scale graphene sheet to flexible substrates with minimal quality degradation. In this thesis, a bilayer polymer support for graphene transfer is proposed. Liquid PDMS (polydimethylsiloxane) is first coated on graphene to conform to its surface morphology. A flexible plastic substrate is then pressed on PDMS as a durable support. After PDMS is cured, electrochemical delamination is used to separate graphene from the copper foil. Due to the extremely low work of adhesion between graphene and PDMS, the graphene film on PDMS can be further transferred onto silicon wafer or other flexible substrates by simple adhesion. An added benefit of the PDMS layer is its strain isolation effect, which could protect graphene-based devices from breaking under external loads applied on the flexible substrate. The strain isolation effect of PDMS is verified with an analytical model and finite element analysis. The design of a prototype roll-to-roll graphene transfer machine is also presented.
Wafer scale exfoliation of monocrystalline micro-scale silicon films
(2020-08-17) Ward, Martin John; Cullinan, Michael; Liechti, Kenneth M; Sreenivasan, S.V.; Li, Wei
This document presents a new method and tool for controlling the thicknesses and quality of exfoliated monocrystalline silicon thin-films. The method described here is compatible with traditional wafer-based, metal-oxide-semiconductor (CMOS) fabrication techniques. It enables high-performance devices fabricated using CMOS processes to be easily integrated into flexible electronic products such as wearable or Internet of Things (IoT) devices. A finite-element linear-elastic fracture mechanics study was performed to understand the parameters that control the exfoliation process. A metamodel was created from the simulation results to inform the design and operation of a new exfoliation tool. This new exfoliation tool improves on previous iterations by creating a controlled peeling force that propagates the crack in a precise manner while utilizing the metamodel to produce higher quality films and actively compensate for errors in the tensile layer. Inline metrology was added to the tool to enable the error compensation. A careful precision design of the tool stage stage was performed to ensure the accuracy of the inline metrology. The results confirm the new tool's ability to correct the crack trajectory and show improvement in the uniformity and quality of the exfoliation compared to previous methods.