Browsing by Subject "AI accelerator"

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High-speed, energy-efficient, and scalable optical computing and interconnects with CMOS-compatible silicon photonic-electronic integrated circuits
(2023-04-24) Feng, Chenghao; Chen, Ray T.; Pan, David Z.; Demkov, Alexander A.; Incorvia, Jean Anne; Banerjee, Sanjay K.
Integrated photonics is a promising technology for next-generation computing because of the essential characteristics of light, including low latency, high bandwidth, and low power consumption. In the past decades, Integrated photonics has evolved significantly over the past few decades, with abundant passive and active optical components offering ultrahigh bandwidth and ultralow power consumption. In addition, advancements in fabrication technologies have also enabled the co-integration of silicon-based electronic and photonic circuits on a chip, allowing for the realization of complex computing tasks with electrons and photons. Previous work reveals that photonic-electronic computing circuits have the potential to outperform transistor-based electronic computing circuits by orders of magnitude in speed and energy efficiency. However, the scalability of photonic-electronic circuits still requires improvement, which is critical to the success of optical computing in the post-Moore’s law era, especially given the need for this technology to compete with other emerging computing technologies. This dissertation proposes the development of scalable photonic-electronic integrated circuits that capitalize on the strengths of electrons and photons to facilitate high-speed, energy-efficient computing and intra-chip interconnects. We explore scaling technologies for photonic computing systems that optimize the area and energy efficiency, such as wavelength division multiplexing (WDM), and demonstrate their effectiveness through experimental demonstrations. Our investigation of photonic-electronic computing circuits spans from the device to the architecture level and includes both digital and analog computing. We first introduce the building blocks of optical computing, including essential components like electro-optic modulators, and discuss general scaling technologies in silicon-based photonic-electronic computing circuit designs. We then present a WDM-based photonic-electronic digital comparator with experimental demonstrations that exhibit its practicality in performing high-performance arithmetic logic operations. Next, we investigate photonic-electronic circuits for intra-chip interconnect with a WDM-based photonic-electronic switching network. These photonic-electronic digital logic circuits can be operated at 20 Gb/s with experimental demonstrations. Additionally, we focus on optical analog computing and discuss scaling strategies for photonic-electronic analog computing circuits that can accelerate artificial intelligence (AI) tasks. We present a subspace optical neural network architecture that trades the universality of weight representation for better hardware usage, such as a smaller footprint and lower energy consumption. We experimentally demonstrate its utility using a butterfly-style photonic-electronic neural chip. Finally, we investigate device-level optimization of the optical neural network using a promising multi-operand optical neuron to further scale down the footprint of photonic neural chips. We conduct thorough performance discussions of these photonic-electronic computing circuits, demonstrating their potential to outperform transistor-based computing circuits in terms of computational speed and energy efficiency.