| dc.contributor.advisor |
Ghosh, Joydeep |
| dc.creator |
Radhamohan, Ranjan Subbaraya
|
| dc.date.accessioned |
2011-02-21T19:57:09Z |
| dc.date.accessioned |
2011-02-21T19:57:22Z |
| dc.date.available |
2011-02-21T19:57:09Z |
| dc.date.available |
2011-02-21T19:57:22Z |
| dc.date.created |
2010-12 |
| dc.date.issued |
2011-02-21 |
| dc.date.submitted |
December 2010 |
| dc.identifier.uri |
http://hdl.handle.net/2152/ETD-UT-2010-12-2423 |
| dc.description.abstract |
The application of popular image processing and classification algorithms, including agglomerative clustering and neural networks, is explored for the purpose of grouping semiconductor wafer defect map patterns. Challenges such as overlapping pattern separation, wafer rotation, and false data removal are examined and solutions proposed. After grouping, wafer processing history is used to automatically determine the most likely source of the issue. Results are provided that indicate these methods hold promise for wafer analysis applications. |
| dc.format.mimetype |
application/pdf |
| dc.language.iso |
eng |
| dc.subject |
Semiconductor
|
| dc.subject |
Wafer
|
| dc.subject |
Neural
|
| dc.subject |
Network
|
| dc.subject |
Agglomerative
|
| dc.subject |
Clustering
|
| dc.subject |
Map
|
| dc.subject |
Defect
|
| dc.subject |
Yield
|
| dc.title |
Automatic semiconductor wafer map defect signature detection using a neural network classifier |
| dc.date.updated |
2011-02-21T19:57:22Z |
| dc.contributor.committeeMember |
El-Hamdi, Mohamed |
| dc.description.department |
Electrical and Computer Engineering
|
| dc.type.genre |
thesis |
| dc.type.material |
text |
| thesis.degree.department |
Electrical and Computer Engineering
|
| thesis.degree.discipline |
Electrical and Computer Engineering |
| thesis.degree.grantor |
University of Texas at Austin |
| thesis.degree.level |
Masters |
| thesis.degree.name |
Master of Science in Engineering |
